Multistage interconnection networks (MINs) provide an efficient solution for communication between one or more processors and memory modules. These networks are suitable for computationally extensive applications. Although there exist a wide variety of fault-tolerant MIN designs, however there is always a scope of improvement in the design of MINs, which comes with challenges and trade-offs. More specifically there is always a need for fault-tolerant, reliable, and cost-effective designs of MINs, which can tolerate multiple switches and link failures. This always motivates a researcher to focus on various design options and architectural models to enhance performance of the MINs.Designing fault-tolerant MINs requires more disjoint paths from each source–destination (S-D) node pair capability to use all available paths effectively. This paper proposes a new MIN layout viz; 6DP-MIN, which provides six disjoint paths and 14/12 redundant paths for different S-D node pairs. This proposed 6DP-MIN is a modification of gamma interconnection network ( GIN). Performance of the proposed design layout (6-Disjoint Path MIN) has been evaluated in terms of fault-tolerance capability, all available paths, reliability (two-terminal, broadcast, and network), and cost per unit. The results have been compared with other variants of GINs such as SEGIN, SEGLNIN, 3-Disjoint gamma interconnection network, 3- disjoint path multistage interconnection networks, and 4-DGINs. The results suggests that the proposed 6DP-MIN is highly fault-tolerant and reliable with regards to other MINs used for comparison.