A novel MTCMOS based 8T2M NVSRAM design for low power applications with high temperature endurance

Abstract

This research investigates, for the first time, a novel eight-transistor-two-memristor (8T2M) nonvolatile 
static random access memory (NVSRAM) with 7-nm technology. The key innovation in this design lies 
in the incorporation of multiple-threshold complementary metal oxide semiconductor (MTCMOS) 
technology with power gating technique, which enables efficient power management and enhanced 
performance with low leakage current. The implementation of multiple threshold voltage levels allows 
for dynamic control of transistor behavior, optimizing power consumption and read/write speeds. As 
compared to a traditional six-transistor (6T) static random access memory (SRAM) cell, it has been 
ascertained that there is a 33% enhancement in the read margin and an 18% improvement in the write 
margin. Moreover, the delay for read, write ‘0’ and write ‘1’ is also minimized by 63.89%, 37.99% and 
42.77%. Furthermore, the power attenuation is also reduced for read and write by 63.02% and 81.6%, 
respectively with respect to a conventional SRAM.