A novel nano‐scale architecture of Vedic multiplier using majority logic in quantum‐dot cellular automata technology

Abstract

Quantum‐dot cellular automata (QCA) is a useful nano‐scale technology that uses less space and energy than complementary metal oxide semiconductor (CMOS) for circuits designing. Innovative digital automation continually strives for increased density while consuming very little power. QCA, which is based on Coulomb repulsion, is one of the most recent nanotechnologies. On the other hand, derived computing could serve as a useful prototype for energy‐efficient nano‐scale layouts. A multiplier is an important component of various digital circuits. On the basis of QCA, promising nanotechnology, a high‐speed and simple multiplier is constructed in this study. This research focuses on multiplier designs based on two‐bit Vedic multiplier mathematics. The authors use the QCADesigner‐E modelling environment to develop an ultra‐efficient and less complicated two‐bit Vedic multiplier with the assistance of the majority gate for low‐energy and high‐speed nanotechnology applications. Compared with other current structures, the suggested architecture has a reduced cell count and area. Furthermore, simulation findings showed that the suggested design is long‐term viable and may be utilized to implement complicated circuit designs for nano‐communication networks.

Cell Optimization and Realization of Vedic Multiplier Desing in QCA

“…The improvement in the cell count is used as an advantage to propose Vedic multipliers(VM) with optimized architecture and a reduction in function cost. QCA-based architectures are best while incorporating more or less obvious advantages such as steadiness, quickness, minimal space, and less energy usage [3] [4].Researchers have also considered nano computing to increase the QCA's number of arithmetic operations, and various designs have been created. Since multipliers are a fundamental part of the majority of computerized frameworks, including Digital Signal Processing, etc [5].…”