A Novel Ni/WOx/W ReRAM with Excellent Retention and Low Switching Current

Chien, Wei-Ming; Chen, Y. C.; Lee, F. M.; Lin, Yu-Yu; Lai, Erh-Kun; Yao, Y. D.; Gong, Jue; Horng, Sheng Fu; Yeh, Chau‐Shioung; Tsai, Shih-Chang; Lee, C. H.; Huang, Yu‐Ting; Chen, C. F.; Kao, H; Shih, Yung‐Feng; Hsieh, Kuang-Yeu; Lu, C. Y.

doi:10.7567/ssdm.2010.e-8-4

Cited by 1 publication

(3 citation statements)

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“…When the oxygen ion is attracted to the surface of WO x by a positive bias, the top electrode has to block the further penetration of the oxygen (into the top electrode) otherwise the low resistance WO 3 cannot be formed. Furthermore, the work function of the top electrode affects the operation current very significantly, as shown in Figure 29 [65]. When the TE work function is high, the device is limited by thermionic emission resulting in a low operation current.…”

Section: Tmo Rerammentioning

confidence: 98%

“…(Top) SCLC mechanism fits the J-V curve for the initial state of a TiN/WOx/W device. Thermionic emission fits the J-V for Ni/WOx/W (middle), and Pt/WOx/W (bottom) [65].…”

Section: Unipolar Operation and 3d Stacking Of Rerammentioning

confidence: 99%

“…The WO x near the interface is thus converted to WO 3 and the leakage paths are largely sealed. The SET and RESET operations are just reconnecting and rupturing of the filaments in the WO 3 layer through the redox reaction depending on the polarity of the biasing voltage [65].…”

Section: Tmo Rerammentioning

confidence: 99%

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State-of-the-art flash memory devices and post-flash emerging memories

Lue

Chen

2011

Sci. China Inf. Sci.

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Although conventional Floating gate (FG) flash memory has recently gone into the 2X nm node, the technology challenges are formidable below 20 nm. Charge-trapping (CT) devices are promising to scale beyond 20 nm but below 10 nm both CT and FG devices hold too few electrons for robust MLC (multi-level cell, or more than one bit storage per cell) storage. However, due to the simpler structure and its more robust storage (not sensitive to tunnel oxide defects since charges are stored in deep trap levels), CT is much more desirable than FG in 3D stackable Flash memory. Optimistically, 3D CT Flash memory may allow the density increase to continue for at least another decade beyond the 1Xnm node. In this paper, we review the current status of FG devices, their scaling challenges, and the operation principles of CT devices and several variations such as MANOS and BE-SONOS. We will then discuss various 3D memory architectures, technology challenges and address the poly-silicon thin film transistor (TFT) issues. Devices that do not rely on charge storage are naturally not limited by the number of electrons, thus promise further scaling below 10 nm. Several of the most promising post-flash era devices, their operation principle and critical issues are reviewed. (One of them, phase change memory, will be covered in a separate article thus not included here.) Their potential applications and challenges for 3D stacking are critically examined. State-of-the-art floating gate flash memoryFlash memories have become ubiquitous in consumer electronics, mobile devices and PC and enterprise applications [1]. The basic operation principle of flash memory device is to store electrons in a floating gate (FG) or a charge-trapping layer (such as SONOS) and accordingly the Vth of the MOSFET devices is changed and identified as the stored logic state. The older EEPROM (electrically erasable and programmable read only memory) uses two transistors to provide RAM-like random access and bit alterable features. Flash memory gives up the bit alterable feature and adopts a block erase (flash) to achieve a 1-transistor (1T) cell that allows much higher density. Over the years, the array architecture has converged into NOR and NAND types (Figure 1) for different applications.NOR Flash device uses channel hot electron (CHE) injection for programming and has retained fast random access capability suitable for code storage applications. The random access feature requires a

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Section: Tmo Rerammentioning

confidence: 98%

“…(Top) SCLC mechanism fits the J-V curve for the initial state of a TiN/WOx/W device. Thermionic emission fits the J-V for Ni/WOx/W (middle), and Pt/WOx/W (bottom) [65].…”

Section: Unipolar Operation and 3d Stacking Of Rerammentioning

confidence: 99%