2010
DOI: 10.1109/ted.2009.2039545
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A Novel Partial-Ground-Plane-Based MOSFET on Selective Buried Oxide: 2-D Simulation Study

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Cited by 102 publications
(44 citation statements)
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“…There is an immediate to proposed new materials and devices to keep Moore's law valid in future with silicon‐based devices and to address the Short Channel Effects (SCE) issues. The different methods used by researchers to reduce SCEs include the use of different channel materials, high‐κ gate oxide materials, selective buried oxide devices, and different processes such as shallow trench isolation and source/drain metal silicide's technology . Further, the process variation effects due to discreteness and randomness of the dopant charges of dopant contribute significantly in deteriorating the overall performance of the devices.…”
Section: Introductionmentioning
confidence: 99%
“…There is an immediate to proposed new materials and devices to keep Moore's law valid in future with silicon‐based devices and to address the Short Channel Effects (SCE) issues. The different methods used by researchers to reduce SCEs include the use of different channel materials, high‐κ gate oxide materials, selective buried oxide devices, and different processes such as shallow trench isolation and source/drain metal silicide's technology . Further, the process variation effects due to discreteness and randomness of the dopant charges of dopant contribute significantly in deteriorating the overall performance of the devices.…”
Section: Introductionmentioning
confidence: 99%
“…11(a), the first step is partial oxide ion implantation to form the SiO 2 burier layers. As discussed in [21] and [22], the SiO 2 burier isolations could be formed inside of the silicon substrate by high-energy oxide ion implantation with a hard mask. Because the SiO 2 burier layer is internal to the substrate instead of on the surface, the P-or N-can be epitaxial grown on the substrate and then doped to form the alternating structure as shown in Fig.…”
Section: Fabrication and Materials Considerationmentioning
confidence: 99%
“…AS there has been continuous shrinkage of transistor sizes to get high performance with low power consumption, the Short Channel Effects (SCEs) have appeared in the conventional bulk Metal Oxide Field Effect Transistors (MOSFETs), that become the issue in miniaturization at sub-micron regime [1]. The performance level of bulk MOSFETs decreases when the dimension comes to nanometer range (<65) due to different SCEs like Drain Induced Barrier Lowering(DIBL), threshold voltage roll off, high leakage current [2]. DIBL effect appears in short channel bulk MOSFETs as a result of variation of the threshold voltage and the sub-threshold current with the drain bias.…”
Section: Introductionmentioning
confidence: 99%