A novel quantum-dot cellular automata CLB of FPGA

Kianpour, Moein; Sabbaghi‐Nadooshan, Reza

doi:10.1007/s10825-014-0590-z

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2020

2024

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Cited by 25 publications

(1 citation statement)

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“…The design of a 16-bit×32-bit SRAM was designed for the high operating speed. It has the potential of a conventional logic SRAM to perform the read/write operations with minimum delay [15]. A novel loop-based Random access memory cell with asynchronous set and reset mood was designed using a multiplexer and Dlatch and is extended to construct an efficient 1×4 RAM and 4×4 RAM with three-layer structure [16].…”

Section: Introductionmentioning

confidence: 99%

A systematic design approach for a novel energy efficient ALU for 8-bit QCA microcontroller

karuppiah,

Deivasigamani

2024

Preprint

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Quantum Cellular Automata (QCA) provide a new computing paradigm to implement the high speed digital architecture at nano-scale with low power consumption. The design of an 8-bit arithmetic logic unit (ALU) for microcontroller using QCA technology is the most challenging and has not been addressed so far. In this paper, we propose a systematic design approach for the design of novel energy-efficient 8-bit ALUs for scalar microcontrollers using QCADesigner. The proposed eight-bit ALU uses 24.25 (10-1ns) clock delay, occupies 198.48 µm2 area, and dissipates 15.5 eV of energy.

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Section: Introductionmentioning

confidence: 99%