A Novel Strategy of Area Cost Estimation for Custom Instruction Based on FPGA Architecture

Abstract

Area cost estimation model is important for accurate measurement of area on reconfigurable processor. However, in the process of CI (Custom Instruction), traditional model can’t accurately estimate area cost of CI candidates. In the paper, we propose a novel strategy of area cost estimation. According to island-style FPGA (Field Programmable Gate Array) structure, the strategy firstly enumerated all BCs (Basic Cells) from data-path of CI candidates. Then checked all the validity of BCs enumerated, and selected the unique BC set to overlap original data-paths. We lastly used the effective estimation model based on BC to accurately measure area cost of candidates. Experimental results show that novel strategy can accurately estimate area cost of CI candidates, which is very close to actual result from a HLS (High Level Synthesis) tool, and deviation is less than 6%.