A novel transistor model for simulating avalanche-breakdown effects in Si bipolar circuits

Avalanche multiplication and pinch-in models for simulating electrical instability effects in SiGe HBTs

“…The model proposed in [6] shows a maximum percentage error about 40%, while the new model with optimized parameters reduces the maximum percentage error below 10%. Parameter optimization has been also performed using experimental data for two different technologies.…”

“…The model proposed by Rickelt and Rein [6] provides acceptable results for weak avalanche (see Figs. 3 and 4) and does not include high-current effects, (5).…”

“…[6][7][8][9]). These models retain a reasonable accuracy only for a limited range of the collector voltage.…”

“…A different approach has been proposed in [8] and detailed in (6); this formulation is more accurate for high V CB values and accounts for the current-dependence of the multiplication factor (see (7)), whereas it suffers from a lack of accuracy at low V CB values, as shown in Figs. 3 and 4.…”

“…Unfortunately, when the device is biased above BV CEO the operation is more complex, since avalanche multiplication effects cause a base current reversal. This in turn results in a distributed ohmic drop across the base region yielding a current focusing in the centre of the base, known as the pinch-in effect [4][5][6]. Therefore, in order to predict the SOA boundaries encountered in realistic circuit applications, an accurate model for the pinch-in effect is required.…”