2012
DOI: 10.1007/978-3-642-28658-2_88
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A Parallel CRC Algorithm Based on Symbolic Polynomial

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Cited by 2 publications
(1 citation statement)
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“…FPGAs are the perfect system to implement TMR due to its parallel design architecture. [382,383], Built-In Self Test (BIST) [344, [384][385][386][387][388], hash function implementations [389][390][391][392][393][394], parallel and high speed Cyclic Redundancy Check (CRC) implementations [395][396][397][398] and efficient intrusion detection systems [399][400][401][402][403][404].…”
Section: Computer Securitymentioning
confidence: 99%
“…FPGAs are the perfect system to implement TMR due to its parallel design architecture. [382,383], Built-In Self Test (BIST) [344, [384][385][386][387][388], hash function implementations [389][390][391][392][393][394], parallel and high speed Cyclic Redundancy Check (CRC) implementations [395][396][397][398] and efficient intrusion detection systems [399][400][401][402][403][404].…”
Section: Computer Securitymentioning
confidence: 99%