A parallel integer programming approach to global routing

Wu, Tai-Hsuan; Davoodi, Azadeh; Linderoth, Jeff

doi:10.1145/1837274.1837323

Cited by 39 publications

(21 citation statements)

References 9 publications

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“…Overall this decomposition is extended from PGRIP [16], but we make use of our initially provided global routing solution for more effective decomposition to determine the fixed terminal locations on the boundaries for independent and parallel processing of the subproblems. …”

Section: Decompositionmentioning

confidence: 99%

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Power-Driven Global Routing for Multisupply Voltage Domains

Davoodi

Linderoth

2013

VLSI Design

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This work presents a method for global routing (GR) to minimize power associated with global nets. We consider routing in designs with multiple supply voltages. Level converters are added to nets that connect driver cells to sink cells of higher supply voltage and are modeled as additional terminals of the nets during GR. Given an initial GR solution obtained with the objective of minimizing wirelength, we propose a GR method to detour nets to further save the power of global nets. When detouring routes via this procedure, overflow is not increased, and the increase in wirelength is bounded. The power saving opportunities include (1) reducing the area capacitance of the routes by detouring from the higher metal layers to the lower ones, (2) reducing the coupling capacitance between adjacent routes by distributing the congestion, and (3) considering different power weights for each segment of a routed net with level converters (to capture its corresponding supply voltage and activity factor). We present a mathematical formulation to capture these power saving opportunities and solve it using integer programming techniques. In our simulations, we show considerable saving in a power metric for GR, without any wirelength degradation.

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Section: Decompositionmentioning

confidence: 99%

“…for a total sum of 70 min for each of the benchmarks. We note, in this work unlike PGRIP [16], our decomposition procedure creates independent subproblems so there will not be any communication between the subproblems.…”

Section: Power-aware Global Routingmentioning

confidence: 99%

Power-Driven Global Routing for Multisupply Voltage Domains

Davoodi

Linderoth

2013

VLSI Design

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“…Probabilistic methods are highly inaccurate and fail to capture the behavior of global routing, especially in modern designs with numerous IP blockages and a large number of metal layers with varying width and spacing. Lately, the third method has become more attractive and mainstream due to the advent of fast, high-quality global routers [Xu et al 2009;Chang et al 2008;Cho et al 2007;Chen et al 2009;Wu et al 2010]. Although global-routing-based congestion analysis provides a happy medium between probabilistic analysis and detailed routing, it suffers from two key drawbacks.…”

Section: Introductionmentioning

confidence: 99%

Techniques for scalable and effective routability evaluation

Wei

Sze

Viswanathan³

et al. 2014

ACM Trans. Des. Autom. Electron. Syst.

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Routing congestion has become a critical layout challenge in nanoscale circuits since it is a critical factor in determining the routability of a design. An unroutable design is not useful even though it closes on all other design metrics. Fast design closure can only be achieved by accurately evaluating whether a design is routable or not early in the design cycle. Lately, it has become common to use a "light mode" version of a global router to quickly evaluate the routability of a given placement. This approach suffers from three weaknesses: (i) it does not adequately model local routing resources, which can cause incorrect routability predictions that are only detected late, during detailed routing, (ii) the congestion maps obtained by it tend to have isolated hot spots surrounded by noncongested spots, called "noisy hot spots", which further affects the accuracy in routability evaluation, (iii) the metrics used to represent congestion may yield numbers that do not provide sufficient intuition to the designer; moreover, they may often fail to predict the routability accurately. This paper presents solutions to these issues. First, we propose three approaches to model local routing resources. Second, we propose a smoothing technique to reduce the number of noisy hot spots and obtain a more accurate routability evaluation result. Finally, we develop a new metric which represents congestion maps with higher fidelity. We apply the proposed techniques to several industrial circuits and demonstrate that one can better predict and evaluate design routability, and congestion mitigation tools can perform much better to improve the design routability.

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“…Ever since the release of large industrial benchmarks in the ISPD 2007 contest [11], new global routers have emerged which have pushed the boundaries to obtain higher solution quality and faster runtime [2], [3], [4], [5], [6], [9], [10], [13], [14], [18], [20], [21], [27], [28], [30], [23], [24]. Most recently, the work [29] proposes a multi-level global router with significant improvements both in wirelength and runtime.…”

Section: Introductionmentioning

confidence: 99%

“…The concurrent procedures consider simultaneous routing of all the nets [2], [5], [18], [27], [28], while the sequential ones impose an ordering to route the nets [3], [4], [9], [10], [13], [20], [21], [30]. Furthermore, the sequential techniques apply drastically different procedures for different steps such as net ordering, layer assignment, and route generation.…”

Section: Introductionmentioning

confidence: 99%

Collaborative Multiobjective Global Routing

Shojaei

Davoodi

Basten

2013

IEEE Trans. VLSI Syst.

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Abstract-This work presents a collaborative procedure for multi-objective global routing. Our procedure takes as input multiple global routing solutions, which are generated independently (e.g., by one router that runs in different modes concurrently, or by different routers running in parallel). It then performs multi-objective optimization based on Pareto algebra and quickly generates multiple global routing solutions with a tradeoff between the considered objectives. The user can control the number of generated solutions and the degree of exploring the tradeoff between them by constraining the maximum allowable degradation in each objective. This work then considers the following three multi-objective case studies: minimization of interconnect power and wirelength, minimization of routing congestion and wirelength, and minimization of wirelength with respect to the (finite-capacity) routing resources. The maximum allowable degradation in wirelength is specified in all cases. Our multi-objective procedure runs in only a few minutes for each of the ISPD 2008 benchmarks, even for the unroutable ones, which imposes a tolerable overhead in the design flow. In our simulations, we demonstrate the effectiveness of our procedure using five modern academic global routers.

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A parallel integer programming approach to global routing

Cited by 39 publications

References 9 publications

Power-Driven Global Routing for Multisupply Voltage Domains

Power-Driven Global Routing for Multisupply Voltage Domains

Techniques for scalable and effective routability evaluation

Collaborative Multiobjective Global Routing

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