A parametrized algorithm that implements sequential, causal, and cache memory consistency

Abstract

In this paper we present an algorithm that can be used to implement sequential, causal, or cache consistency in distributed shared memory (DSM) systems. For this purpose it has a parameter that allows to choose the consistency model to be implemented. We can also use our algorithm such that not all processes have the same value in this parameter (we have shown the resulting consistency). This characteristic allows to choose a concrete consistency model but implementing it with the algorithm more efficient in each case (in function of the requirements of the applications). As far as we know, this is the first algorithm proposed that implements cache coherence.In our algorithm, when implementing causal and cache consistency all read and write operations are executed locally (i.e., are fast). It is known that no sequential algorithm has only fast memory operations. However, in our algorithm, when implementing sequential consistency all write operations and some read operations are fast. The algorithm uses propagation and full replication, where values written by a process are propagated to the rest of processes. It works in a cyclic turn fashion, with each process of the DSM system broadcasting one message in its turn. The values written by the process are sent in the message (instead of sending one message for each write operation), but unnecessary values are excluded. All this allows to control the amount of message traffic due to the algorithm.

Optimal propagation-based protocols implementing causal memories

“…Several other protocols implementing causal consistency have appeared in the literature [2,6,16,25].…”

“…The protocol presented in [16] is a propagation-based protocol using complete replication. However, differently from protocols in [1,6,25], the propagation is not immediate but it is token-based.…”

Decoupled Interconnection of Distributed Memory Models

“…For simplicity, in both cases we consider, as in [3,5,8,18,24,26,25], that each MCSprocess has a copy (replica) of the whole shared memory. In an MCS with invalidation, some of the copies of a variable x can be "invalid" or outdated.…”

“…This value is returned to an application process that issues a read operation. New written values are propagated among MCS-processes to maintain the copies up to date [3,5,8,18]. …”