A perspective on CMOS technology trends

Holton, W. C.; Cavin, Ralph K.

doi:10.1109/proc.1986.13683

Cited by 21 publications

(2 citation statements)

References 114 publications

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“…The number of logic circuits on CMOS gate array chips have increased with time [5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20]. Gate array chips have transistor assemblages on "lattice" positions.…”

Section: Historical Backgroundmentioning

confidence: 99%

Challenges in advanced semiconductor technology for high-performance and supercomputer applications

Osburn

Reisman

1987

J Supercomput

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This article provides a review of the capabilities, future directions, and technology challenges for semiconductor chips and packages as they apply to high-performance and supercomputer applications. Semiconductor chip technology has resulted in dramatic device density improvements over the last 20 years. Scaling theory predicts that continued improvements will be possible if the technological problems associated with patterning, doping, interconnection, density, yield, and cost can be solved. The issues associated with these challenges are discussed. Finally, the packaging needs to support advanced chip technologies are reviewed.

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Section: Historical Backgroundmentioning

confidence: 99%

Challenges in advanced semiconductor technology for high-performance and supercomputer applications

Osburn

Reisman

1987

J Supercomput

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“…Therefore, researchers tried to realize the vacuum tube in solid-state for which the surface of semiconductors was studied thoroughly. Lilienfeld first reported the idea of enhancing the surface conductance of a semiconductor by application of electric field in 1930, but it was not successful because of the presence of large densities of surface states [2]- [3]. The first MOSFET was fabricated in 1960 by Kahng and Atalla [4] on a silicon substrate using an oxide layer (SiO 2 ) as the gate insulator.…”

Section: Introductionmentioning

confidence: 99%

Revisiting Analytical Models of N-Type Symmetric Double-Gate MOSFETs Shaded Conditions

Ahmed¹,

Saha²

2020

ELS

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Nowadays, the endlessly increasing demand for faster and complex integrated circuits (IC) has been fuelled by the scaling of metal-oxide-semiconductor field-effect-transistors (MOSFET) to smaller dimensions. The continued scaling of MOSFETs approaches its physical limits due to short-channel effects (SCE). Double-gate (DG) MOSFET is one of the promising alternatives as it offers better immunity towards SCEs and can be scaled to the shortest channel length. In future, ICs can be designed using DG-CMOS technology for which mathematical models depicting the electrical characteristics of the DG MOSFETs are foremost needed. In this paper, a review on n-type symmetric DG MOSFETs models has been presented based on the analyses of electrostatic potential distribution, threshold voltage, and drain-current models. Mathematical derivations of the device models are described elaborately, and numerical simulations are also carried out to validate the replicability of models.

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Switched‐capacitor sequential‐flash data converters

Watanabe

Matsumoto

1988

Electron Comm Jpn Pt II

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Sequential‐flash data converters using switched‐capacitor circuits are developed for realizing a given conversion speed with a minimum number of components. Repeating n‐bit flash conversion m times, each converter accomplishes (m x n)‐bit digital‐to‐analog or analog‐to‐digital conversion in m cycles of a clock frequency. An accurate conversion is also possible because each converter is configured such that the offset voltages of op‐amps and parasitic capacitances have no effect on the conversion process. Error analysis shows that a conversion accuracy higher than 8 bits can be expected from each converter if integrated using present MOS technologies. Prototype converters built using discrete components are also given to confirm the principles of operation.

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A perspective on CMOS technology trends

Cited by 21 publications

References 114 publications

Challenges in advanced semiconductor technology for high-performance and supercomputer applications

Challenges in advanced semiconductor technology for high-performance and supercomputer applications

Revisiting Analytical Models of N-Type Symmetric Double-Gate MOSFETs Shaded Conditions

Switched‐capacitor sequential‐flash data converters

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