A phase noise minimization of CMOS VCOs over wide tuning range and large PVT variations

Miyashita, Daisuke; Ishikuro, Hiroki; Kousai, Shouhei; Kobayashi, Hiroyuki; Majima, H.; Agawa, Kenichi; Hamada, Mototsugu

doi:10.1109/cicc.2005.1568735

Cited by 17 publications

(7 citation statements)

References 7 publications

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“…Compared with [3], this avoids the noise injection as analog AAC loop which works in closed loop and brings noise to current source comes from amplitude detector mismatching or others. Compared with proposed module in [4], without using DAC component, it reduced extra area and power consumption.…”

Section: B Aac Loop Designmentioning

confidence: 97%

A digitally reconfigurable auto amplitude calibration method for wide tuning range VCO design

Zhang

Sun

et al. 2010

2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology

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A wide tuning range LC VCO with auto amplitude control is designed in 0.13-ȝm CMOS. Phase noise optimized design for the wide tuning range VCO is discussed and a PVT insensitive digitally reconfigurable auto amplitude calibration (AAC) circuit is used to stabilize the phase noise in the whole wide band. The proposed AAC circuit with a code estimated FSM provides faster operation to get the optimum state than the conventional one. Transistor-level simulations show that the proposed AAC method improves phase noise performance by more than 10dB.. IntroductionWireless communication industry is developing very fast recently. Variable wireless communication standards are optimized for its specific usage. Different wireless communication standards use different carrier frequency and channel bandwidth. Even for the same one communication standards, for example GSM with 850, 900, 1800 and 1900 MHz carriers, with different carrier frequencies are used worldwide. Various multi-band multi-standard solutions are explored for those radio communication needs. Among them, software-defined radio (SDR), which uses one radio to satisfy any communication standard with very wide frequency range, has a lot of benefits known for years [1].Wide-tuning voltage-controlled oscillator (VCO) design is a critical component in SDR realization. As technology advances, a low-noise wide-tuning CMOS LC VCO design becomes more challenging due to increased device noise and modeling inaccuracy. To maintain good phase noise performance in wide frequency range, increasing the oscillation amplitude would reduces the phase noise of LC VCO [2]. However, as the current in VCO increases, the amplitude saturates by the headroom from supply voltage, which means additional current would be a waste of power. Although several papers [3] [4] proposed automatic amplitude control (AAC) circuits with PVT insensitive, additional analog feedback close-loop [3] degrades LC-VCO performance and extra DAC circuit in [4] consumes much more power and cost.In this work, a novel circuit automatically controls amplitude of LC VCO to reach optimum phase noise over a wide frequency range is proposed. Section 2 analyses phase noise in LC VCO with different current-regime. The impact of VCO amplitude and proposed AAC circuit is presented in Section 3. Simulation results and conclusion are shown in Section 4 and 5. Phase Noise Analysis in LC VCO

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Section: B Aac Loop Designmentioning

confidence: 97%

A digitally reconfigurable auto amplitude calibration method for wide tuning range VCO design

Zhang

Sun

et al. 2010

2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology

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“…In the RF transceiver, the phase noise of the local oscillator is a critical parameter and determines the system performance [1]. However, amplitude and phase noise performance of the VCO in the RF frequency synthesizer is sensitive to the PVT (Process, Voltage, Temperature) variations.…”

Section: Introductionmentioning

confidence: 99%

“…Although several papers [1,4] reported automatic amplitude control (AAC) circuits for the CMOS LC-VCOs, they have not focused on low power application. And the papers [5,6] about low power VCO used large inductor which occupies large layout area and causes relative narrow tuning range.…”

Section: Introductionmentioning

confidence: 99%

A 84% tuning range, 4.3-GHz VCO with two-step negative-Gm tuning and amplitude calibration loop

Park

Kim

et al. 2010

Analog Integr Circ Sig Process

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This paper presents wideband, low voltage CMOS LC-VCO with automatic two-step amplitude calibration loop to compensate the PVT variation. To cover the wide tuning range, digital automatic negative-G m tuning loop and analog automatic amplitude calibration loop are proposed. The power consumption is 2-6 mA from a 1.2 V supply. The VCO tuning range is 3.4 GHz, from 2.35 to 5.75 GHz. The measured phase noise is -117 dBc/Hz at the 1 MHz offset when the center frequency is 4.313 GHz.

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“…The output buffer (M11) is designed for isolating from a load circuit. Compared with bipolar transistors, the device parameters of MOSFETs usually change widely according to process, supply voltage, and temperature (PVT) variations [7]. The Fig.…”

Section: 2 Ghz Vco Circuit Designmentioning

confidence: 99%

“…The simulation results present that the frequency and output power of the proposed 5.2 GHz VCO are still sensitive by the variation of the gate bias due to the PVT variations and the L2 and L3 inductance variations. However, though the frequency and output power of the proposed 5.2 GHz VCO are some sensitive, the VCO can be solved by the help of the some control circuits like [7] and [8] to compensate the PVT variations.…”

Section: 2 Ghz Vco Circuit Designmentioning

confidence: 99%

A 2.4 /5.2-GHz Dual Band CMOS VCO using Balanced Frequency Doubler with Gate Bias Matching Network

Choi¹,

Yu²,

Kim³

2009

JSTS:Journal of Semiconductor Technology and Science

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A phase noise minimization of CMOS VCOs over wide tuning range and large PVT variations

Cited by 17 publications

References 7 publications

A digitally reconfigurable auto amplitude calibration method for wide tuning range VCO design

A digitally reconfigurable auto amplitude calibration method for wide tuning range VCO design

A 84% tuning range, 4.3-GHz VCO with two-step negative-Gm tuning and amplitude calibration loop

A 2.4 /5.2-GHz Dual Band CMOS VCO using Balanced Frequency Doubler with Gate Bias Matching Network

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