This paper presents a new extraction technique for non-quasi-static (NQS) delay time and gate resistance for relaxation-time-approximation based MOS transistor models. The technique is based on analysis of Ydg in strong inversion, as a function of both VGS and frequency, for Vos = O. An effective delay Teff is computed from measured data, and a plot of Teff versus the theoretical NQS-only delay allows the NQS relaxation time parameter and the gate resistance to be determined self consistently.