A picopower temperature‐compensated, subthreshold CMOS voltage reference

Abstract

A voltage reference consisting of only two nMOS transistors with different threshold voltages is presented. Measurements performed on 23 samples from a single batch show a mean reference voltage of 275.4 mV. The subthreshold conduction and the low number of transistors enable to achieve a mean power consumption of only 40 pW. The minimum supply voltage is 0.45 V, which coincides with the lowest value reported so far. The mean TC in the temperature range from 0 to 120 C is 105.4 ppm/ C, while the mean line sensitivity is 0.46%/V in the supply voltage range 0.45-1.8 V. The occupied area is 0.018 mm 2 . The power supply rejection rate without any filtering capacitor is À48 dB at 20 Hz and À29.2 dB at 10 kHz. Thanks to large area transistors and to a careful layout, the coefficient of variation of the reference voltage is only 0.62%. We introduce as a new figure of merit, the voltage temperature parameter (VTP), which gives a direct measure of the overall percentage variation of the reference voltage on the typical 2D domain of supply voltage and temperature. For the proposed circuit, the average VTP is 1.70% with a standard deviation of 0.21%. In order to investigate the effect of transistor area on process variability, a 4X replica of the proposed configuration has been fabricated and tested as well. Except for LS, the 4X replica doesn't exhibit any appreciable improvement with respect to the basic voltage reference.

Survey of Bandgap and Non-bandgap based Voltage Reference Techniques

“…Iannaccone et al [17] presented a voltage reference consisting of only two nMOS transistors with di erent threshold voltages. Measurements performed on 23 samples from a single batch show a mean reference voltage of 275.4 mV.…”

A portable class of 3‐transistor current references with low‐power sub‐0.5 V operation

“…In spite of the interest for low-voltage and low-power current references, only a limited number of topologies have been proposed so far, [6][7][8][9][10][11][12][13] especially if compared with the huge number of solutions proposed for the voltage reference counterpart (eg, see previous studies [14][15][16][17][18][19][20][21][22] ). The above current references achieve nanopower consumption, but they are unable to work with bias voltage (V DD ) lower than 1 V, except for the solution proposed by Cucchi et al, 12 which presents a minimum bias voltage of 0.8 V. It is worth pointing out that even 0.8 V is still too high for most of the emerging solutions for IoT nodes.…”

“…The aforementioned constraints for IoT systems are clearly transferred to the design specifications of current references.In spite of the interest for low-voltage and low-power current references, only a limited number of topologies have been proposed so far, 6-13 especially if compared with the huge number of solutions proposed for the voltage reference counterpart (eg, see previous studies [14][15][16][17][18][19][20][21][22] ). The circuit consists of a 2-transistor block that generates a proportional-to-absolute-temperature or a complementary-toabsolute-temperature voltage and a load transistor.…”

An amplifier‐offset‐insensitive and high PSRR subthreshold CMOS voltage reference

“…1 Although several low-voltage low power reference circuits have recently been presented in [2][3][4][5][6][7][8][9][10][11][12][13] , it is difficult to cover all of the key properties of a voltage reference, such as the temperature coefficient (TC), power supply ripple rejection (PSRR), and power and area consumptions. 1 Although several low-voltage low power reference circuits have recently been presented in [2][3][4][5][6][7][8][9][10][11][12][13] , it is difficult to cover all of the key properties of a voltage reference, such as the temperature coefficient (TC), power supply ripple rejection (PSRR), and power and area consumptions.…”