A PN-based approach to the high-level synthesis of digital systems

Shen, Victor R.L.

doi:10.1016/j.vlsi.2005.05.002

Cited by 8 publications

(1 citation statement)

References 23 publications

(36 reference statements)

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“…So the SDF is limited to independent applications. In our approach, we use Colored Timed Petri Net (CTPN) [10][11] to extend dataflow model in a high abstraction for the application specification instead. CTPN uses colored sets to present kinds of resources, and time labels to present the timing of processes, which are efficient to describe data stream and control between processes.…”

Section: Related Workmentioning

confidence: 99%

Prototype Design and Synthesis of Cluster MPSoC Architecture for Multiple Applications

Li¹,

Hou²,

Huang³

et al. 2012

JCP

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Modern embedded devices require high performances such as computing, throughput and power consumption. Multiprocessor System-on-Chip (MPSoC) is a promising solution to meet the requirements. And the Network-on-Chip (NoC) is used as the interconnection of MPSoC. Whereas it brings more challenge on application programming and fast design exploration of software and hardware implements automatically. In this paper we propose a cluster MPSoC architecture, which adopts hybrid interconnection of processor clusters and NoC. And we present a design automation and synthesis methodology to generate MPSoCs in a system-level way for multiple application use-cases. And it merges them onto a minimal hardware architecture of resources. The desired MPSoC design is generated with short design time, making it suited for fast design exploration for MPSoC development. The proposed design flow is implemented into a tool for Xilinx FPGAs. The experiments results illuminate that our design methodology is a convenient approach to generate the MPSoC design for multiple use-cases.

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Section: Related Workmentioning

confidence: 99%