A Prototype System for Many-Core Architecture SMYLEref with FPGA Evaluation Boards

Abstract

SUMMARYNowadays, the trend of developing micro-processor with hundreds of cores brings a promising prospect for embedded systems. Realizing a high performance and low power many-core processor is becoming a primary technical challenge. Generally, three major issues required to be resolved includes: 1) realizing efficient massively parallel processing, 2) reducing dynamic power consumption, and 3) improving software productivity. To deal with these issues, we propose a solution to use many lowperformance but small and very low-power cores to obtain very high performance, and develop a referential many-core architecture and a program development environment. This paper introduces a many-core architecture named SMYLEref and its prototype system with off-the-shelf FPGA evaluation boards. The initial evaluation results of several SPLASH2 benchmark programs conducted on our developed 128-core platform are also presented and discussed in this paper.

Design and Evaluation of Asymmetric and Symmetric 32-core Architectures on FPGA

“…[4] and [5] is the location of the host core. The SMYLEref architecture developed by Nguyen et al [6] takes the similar approach to the one in Ref. [5].…”

“…One of the conceptual differences between Refs. [5] and [6] is the symmetry of the host and slave cores. Makni et al developed two types of multicore architectures [7].…”