A pseudo 2-D surface potential model of a dual material double gate junctionless field effect transistor

Agrawal, Ashutosh; Koutilya, P. N.; Kumar, Manoj

doi:10.1007/s10825-015-0710-4

Cited by 17 publications

(14 citation statements)

References 18 publications

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“…Around the flat‐band voltage, the carrier concentration in the channel is nearly N D . As the gate voltage increases, small amount of opposite charges accumulate at the surface . Using the Taylor's expansion of the exponential term, Equation is approximated to

\frac{\partial^{2} φ_{1 italicABT i} ((), x)}{\partial x^{2}} = \frac{q N_{D}}{ε_{italicsi}} ((), \frac{φ_{1 ABT i} (x) - φ_{n}}{V_{th}}) .

…”

Section: Resultsmentioning

confidence: 99%

“…As the gate voltage increases, small amount of opposite charges accumulate at the surface. 29 Using the Taylor's expansion of the exponential term, Equation 30 is approximated to…”

Section: Figurementioning

confidence: 99%

“…Above the threshold, opposite charges accumulate near the surface and make moving charges appear in the Poisson's equation in addition to the doping charges. Some studies have developed the full rage current model for the JLDG MOSFETs where they have used the Pao‐Sah's dual integral current model, which is valid for all working conditions . In these models, the Gauss's law is applied to the surface and the surface and center electric fields and accumulated charges in the channel are calculated.…”

Section: Introductionmentioning

confidence: 99%

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Semianalytical modeling of the depletion layers and their effects on the threshold voltage of a junctionless double‐gate MOSFET including trapped charges

Beigi

Hashemi

2018

Int J Numerical Modelling

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This paper considers the depletion regions at the source and drain sides in a symmetric junctionless double‐gate metal‐oxide‐semiconductor field‐effect transistor with trapped charges working in subthreshold condition. The effects of depletion layers on the potential, threshold voltage, drain‐induced barrier lowering (DIBL), and the current of the device have been investigated. The channel of the transistor is divided into 4 regions: 2 regions without and with trapped charges and 2 depletion regions on either side of the channel. Solving the 2‐dimensional Poisson's equation, a semianalytical model for the potential is achieved in these regions and the threshold voltage, the DIBL, and the current are calculated. Also, the depletion widths are calculated during the modeling and their variation against the positive and negative trapped charges is investigated. To show the importance of the depletion layers, another junctionless double‐gate metal‐oxide‐semiconductor field‐effect transistor without depletion layers is considered and the mentioned electrical properties of the 2 devices are compared with each other. Smaller central potential, threshold voltage, and current and higher DIBL are achieved when the depletion layers are considered. Good agreement between the results of the proposed model and the simulated results by TCAD software shows the physical validity of the proposed model.

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\frac{\partial^{2} φ_{1 italicABT i} ((), x)}{\partial x^{2}} = \frac{q N_{D}}{ε_{italicsi}} ((), \frac{φ_{1 ABT i} (x) - φ_{n}}{V_{th}}) .

…”

Section: Resultsmentioning

confidence: 99%

“…As the gate voltage increases, small amount of opposite charges accumulate at the surface. 29 Using the Taylor's expansion of the exponential term, Equation 30 is approximated to…”

Section: Figurementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Semianalytical modeling of the depletion layers and their effects on the threshold voltage of a junctionless double‐gate MOSFET including trapped charges

Beigi

Hashemi

2018

Int J Numerical Modelling

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“…It flows through the center of the channel i.e., volume conduction occurs due to the low concentration of the depletion charge carriers [10][11]. The necessity for materials with high work function (~5.6 eV) arises from turning the device properly OFF and lowering the subthreshold leakage current [12], which is technologically challenging. To overcome this problem, the use of dual material (DM) in the gate [1,4] was suggested, enhancing the electrostatic performance of the device by incorporating a step in the surface potential profile.…”

Section: Introductionmentioning

confidence: 99%

“…In 2014, Agarwal et al [12] proposed a pseudo-2-D surface potential model for dual material double gate junctionless field-effect transistor (DMDG-JLFET). Baruah et al [13] presented a study on analog circuit performance of a DMDG-JLFET with a high k-spacer.…”

Section: Introductionmentioning

confidence: 99%

An Approach for Drain Current Modeling Including Quantum Mechanical Effects for a DMDG Junctionless Field Effect Nanowire Transistor

Bora

2021

Silicon

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This paper presents the effects of quantum confinements on the surface potential, threshold voltage, drain current, transconductance, and drain conductance of a Dual Material Double Gate Junctionless Field Effect Nanowire Transistor (DMDG-JLFENT). The carrier energy quantization on the threshold voltage of a DMDG-JLFENT is modeled, and subsequently, other parameters like drain current were analytically presented. The QME considered here is obtained under the quantum confinement condition for an ultra-thin channel, i.e., below 10 nm of Si thickness. The threshold voltage shift due to QME can be used as a quantum correction term for compact modeling of junctionless transistors. The analytical model proposed for surface potential, threshold voltage, drain current, transconductance, and drain conductance were verified by TCAD 3-D quantum simulation results which makes it suitable for SPICE compact modeling.

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Device Architectures to Mitigate Challenges in Junctionless Field‐Effect Transistors

2019

Junctionless Field‐Effect Transistors

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A pseudo 2-D surface potential model of a dual material double gate junctionless field effect transistor

Cited by 17 publications

References 18 publications

Semianalytical modeling of the depletion layers and their effects on the threshold voltage of a junctionless double‐gate MOSFET including trapped charges

Semianalytical modeling of the depletion layers and their effects on the threshold voltage of a junctionless double‐gate MOSFET including trapped charges

An Approach for Drain Current Modeling Including Quantum Mechanical Effects for a DMDG Junctionless Field Effect Nanowire Transistor

Device Architectures to Mitigate Challenges in Junctionless Field‐Effect Transistors

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