A Pthreads-Based MPI-1 Implementation for MMU-Less Machines

Rico‐Gallego, Juan‐Antonio; Alvarez-Llorente, J.M.; Perogil-Duque, F.J.; Antunez-Gomez, P.P.; Díaz-Martín, Juan-Carlos

doi:10.1109/reconfig.2008.24

Cited by 5 publications

(4 citation statements)

References 8 publications

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“…MPI-SV detects 12% of errors and 27% of correct codes and fails on 63% of the tests. These results are related to the use of the multithreaded library for MPI-1 called AzequiaMPI [35]. All results are available on the MBI website with meta-data on the tests links to every test execution log.…”

Section: B Qualitative and Performance Evaluationmentioning

confidence: 99%

The MPI Bugs Initiative: a Framework for MPI Verification Tools Evaluation

Laurent

Saillard

Quinson

2021

2021 IEEE/ACM 5th International Workshop on Software Correctness for HPC Applications (Correctness)

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Ensuring the correctness of MPI programs becomes as challenging and important as achieving the best performance. Many tools have been proposed in the literature to detect incorrect usages of MPI in a given program. However, the limited set of code samples each tool provides and the lack of metadata stating the intent of each test make it difficult to assess the strengths and limitations of these tools. In this paper, we present the MPI BUGS INITIATIVE, a complete collection of MPI codes to assess the status of MPI verification tools. We introduce a classification of MPI errors and provide correct and incorrect codes covering many MPI features and our categorization of errors. The resulting suite comprises 1,668 codes, each coming with a well-formatted header that clarifies the intent of each code and specifies how to execute and evaluate it. We evaluated the completeness of the MPI BUGS INITIATIVE against eight stateof-the-art MPI verification tools.

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Section: B Qualitative and Performance Evaluationmentioning

confidence: 99%

The MPI Bugs Initiative: a Framework for MPI Verification Tools Evaluation

Laurent

Saillard

Quinson

2021

2021 IEEE/ACM 5th International Workshop on Software Correctness for HPC Applications (Correctness)

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“…This approach is similar to [11], where a subset of MPI is used in a FPGA-based clusteron-chip respectively a multiple processor across multiple FPGA architecture. AzequiaMPI [12] is a pthreads-based full MPI-1 implementation for MPSoCs. However, [12] uses thread-based message passing and therefore needs a pthreads box (which mostly requires an operating system) compared to [11] and SoC-MPI.…”

Section: Soc-mpi Message Passing Li-brarymentioning

confidence: 99%

“…AzequiaMPI [12] is a pthreads-based full MPI-1 implementation for MPSoCs. However, [12] uses thread-based message passing and therefore needs a pthreads box (which mostly requires an operating system) compared to [11] and SoC-MPI.…”

Section: Soc-mpi Message Passing Li-brarymentioning

confidence: 99%

Application-driven architecture synthesis of on-chip Multiprocessor systems

Bobda

Mahr

Andres

et al. 2010

2010 International Conference on High Performance Computing &Amp; Simulation

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The exploitation of the rapid growing field of Multiprocessor on chip requires efficient design methodologies and tools. Besides the extraction of task level parallelism, architecture synthesis is of growing importance, in particular for programmable hardware devices, which allow for the reuse of the hardware across applications. Using programmable devices to implement on-chip multiprocessor systems, the architecture of the computing and communication infrastructure can be tailored to match the inherent parallelism of applications. In this paper, we present a design flow for the generation of the computing and communication architecture for a given application. The automatic extraction of the parallelism is presented first, followed by the application-driven synthesis of the computing and communication architecture. Finally, a light weight on-chip communication library as well as a tool-chain for the design of on-chip multiprocessor on programmable devices is explained. Each step of the design process is evaluated with different examples.

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“…Generally, it requires a small space consuming operating system. uClinux, which stands for microcontroller linux, is a version of linux that can run on processors without a MMU [2] . It is created by Dionne and Kenneth Albanowski [3] and originates from Linux 2.0 kernel.…”

Section: Introductionmentioning

confidence: 99%

Designing and Porting Boot Loader and uClinux with Its Implementation Based on LPC2478

Xiong

Gao

2011

2011 7th International Conference on Wireless Communications, Networking and Mobile Computing

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As various applications have been developped for different intention in Embedded System the combination of bootloader and uClinux which is as the base of those plays a more and more important role. uClinux,a linux distribution designed for processors without a Memory Management Unit(MMU), is the operating system that assorts with the device drivers, the platform for applications and the core of Embedded System. Additionally, the boot loader is a program that loads the main operating system. Transparently, boot loader which initializes necessary environment should execute before uClinux. Therefore, those two are feasible on LPC2478, a processor without MMU from NXP semiconductors. This paper introduces the configuration of boot loader and uClinux and represents a whole process of porting boot loader and uClinux on LPC2478.

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A Pthreads-Based MPI-1 Implementation for MMU-Less Machines

Cited by 5 publications

References 8 publications

The MPI Bugs Initiative: a Framework for MPI Verification Tools Evaluation

The MPI Bugs Initiative: a Framework for MPI Verification Tools Evaluation

Application-driven architecture synthesis of on-chip Multiprocessor systems

Designing and Porting Boot Loader and uClinux with Its Implementation Based on LPC2478

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