A quantum physical design flow using ILP and graph drawing

Abstract

Implementing large-scale quantum circuits is one of the challenges of quantum computing. One of the central challenges of accurately modeling the architecture of these circuits is to schedule a quantum application and generate the layout while taking into account the cost of communications and classical resources as well as the maximum exploitable parallelism. In this paper, we present and evaluate a design flow for arbitrary quantum circuits in ion trap technology. Our design flow consists of two parts. First, a scheduler takes a description of a circuit and finds the best order for the execution of its quantum gates using integer linear programming (ILP) regarding the classical resources (qubits) and instruction dependencies. Then a layout generator receives the schedule produced by the scheduler and generates a layout for this circuit using a graph-drawing algorithm. Our experimental results show that the proposed flow decreases the average latency of quantum circuits by about 11% for a set of attempted benchmarks and by about 9% for another set of benchmarks compared with the best in literature.

Optimal ILP-Based Approach for Gate Location Assignment and Scheduling in Quantum Circuits

“…The computational results in Table 4 show the approach proposed in this paper that improves the average latency by about 25.5% and 36.1% compared with GLC and previous ILP-based approach, respectively. Figure 10 presents a comparable view on the results of the proposed model, GLC algorithm [8,23].…”

“…Yazdani et al [23] presented a physical design flow for quantum circuits in ion-trap technology which consists of two parts. First, a scheduler takes a description of a circuit and finds the best order for the execution of its quantum gates using ILP.…”

“…As mentioned in Section 2, Yazdani et al [23] proposed an ILP-based approach that uses ILP to schedule a circuit. To evaluate the effectiveness of our approach over theirs, a comparison has been done between the results obtained from the proposed model, the ILP-based approach [23], and GLC method [8]. The computational results in Table 4 show the approach proposed in this paper that improves the average latency by about 25.5% and 36.1% compared with GLC and previous ILP-based approach, respectively.…”

Mapping of lattice surgery-based quantum circuits on surface code architectures

“…For example, after performing measurements M I X X in (13), the stabilizer IZI is transformed into (−1) M I X X IXX and the logical operator IIZ is transformed into IZZ . Equations (13) and (14) show that the measurement-based procedure does satisfy the transform relations in Equations (9)-(12) and it is thus equivalent to a CNOT.…”

Physical synthesis of quantum circuits using templates

“…They formulated the scheduling and placement problem and presented solution algorithms for these problems. Yazdani et al [37] presented a physical design flow for quantum circuits in ion trap technology which consists of two parts. First, a scheduler takes a description of a circuit and finds the best order for the execution of its quantum gates using ILP.…”