A Raspberry Pi Cluster Instrumented for Fine-Grained Power Measurement

Cloutier, Michael F.; Paradis, Chad; Weaver, Vincent M.

doi:10.3390/electronics5040061

Cited by 43 publications

(24 citation statements)

References 24 publications

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“…Furthermore, they employ optimized CUDA coding on GPUs to show that the mobile Tegra K1 is 61.8x faster than Cortex-A9, whereas high-end desktop GPUs achieve a huge gain over A9, in the area of 1000x (e.g., 2032x versus Nvidia Tesla K80 with nominal 300 W). We note that, in a broader sense [66,67], the throughput of embedded CPUs could increase even by 10x when we consider higher clock rates (e.g., 2.3 GHz) and/or bigger microarchitectures (e.g., ARM Cortex A-57). However, for the sake of categorization, we focus here on more conservative scenarios, such as Cortex A9/A15 operating below 1 GHz.…”

Section: A Literature Resultsmentioning

confidence: 98%

High-Performance Embedded Computing in Space: Evaluation of Platforms for Vision-Based Navigation

Lentaris¹,

Maragos²,

Stratakos³

et al. 2018

Journal of Aerospace Information Systems

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Vision-based navigation has become increasingly important in a variety of space applications for enhancing autonomy and dependability. Future missions, such as active debris removal for remediating the low Earth orbit environment, will rely on novel high-performance avionics to support advanced image processing algorithms with substantial workloads. However, when designing new avionics architectures, constraints relating to the use of electronics in space present great challenges, further exacerbated by the need for significantly faster processing compared to conventional space-grade central processing units. With the long-term goal of designing highperformance embedded computers for space, in this paper, an extended study and tradeoff analysis of a diverse set of computing platforms and architectures (i.e., central processing units, multicore digital signal processors, graphics processing units, and field-programmable gate arrays) are performed with radiation-hardened and commercial offthe-shelf technology. Overall, the study involves more than 30 devices and 10 benchmarks, which are selected after exploring the algorithms and specifications required for vision-based navigation. The present analysis combines literature survey and in-house development/testing to derive a sizable consistent picture of all possible solutions. Among others, the results show that certain 28 nm system-on-chip devices perform faster than space-grade and embedded central processing units by 1-3 orders of magnitude, while consuming less than 10 W. Field-programmable gate array platforms provide the highest performance per watt ratio.

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Section: A Literature Resultsmentioning

confidence: 98%

High-Performance Embedded Computing in Space: Evaluation of Platforms for Vision-Based Navigation

Lentaris¹,

Maragos²,

Stratakos³

et al. 2018

Journal of Aerospace Information Systems

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“…Raspberry Pi 2 Model B was used in the construction of cluster with 25 nodes in [17]. Their goal was to create a cluster for power measurement and educational purposes, proving that the excellent performances can be obtained with low power consumption.…”

Section: Related Workmentioning

confidence: 99%

Image Processing on Raspberry Pi Cluster

Marković

Vujicic²,

Mitrović³

et al. 2019

IJEEC

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The development direction of the high-performance computing has been primarily oriented toward improvements in thenumber of computing units, and their better organization and interconnection. The central processing units in modern mainframes arein some cases inadequate for data parallelization, because a large amount of data requires a large number of processing units. Thisproblem can be partially overcome by introducing embedded devices with enough processing power and with smaller power dissipation,but the new problems emerge, specifically the problem of their interconnection in a distributed environment. One of such devices is aRaspberry Pi board, which has four processing cores in the latest revision, and we combined four of such devices in a cluster. Thesedevices are interconnected via Ethernet router and by using MPI interface, they can be programmed to work as a single unit. Wesupplied a set of images that were processed on the cluster and measured its performance.

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“…Performance comparison between conventional CPUs to embedded ARM processors integrated in SoC devices such as OMAP 4460 are performed in [12], where a relation that involve CPU frequencies, performance and types of CPUs is shown. The study in [13] shows that the throughput of embedded CPUs could be increased tenfold when clock rates of 2.3 GHz are used. From [14], it is derived that the Cortex-A15 processor at 1.2 GHz is 3-5x faster than the Cortex-A9 of Zynq at 667 Mhz.…”

Section: Introductionmentioning

confidence: 99%

Evaluating the computational performance of the Xilinx Ultrascale+ EG Heterogeneous MPSoC

et al. 2020

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The emergent technology of Multi-Processor System-on-Chip (MP-SoC), which combines heterogeneous computing with the high performance of Field Programmable Gate Arrays (FPGAs) is a very interesting platform for a huge number of applications ranging from medical imaging and augmented reality to high-performance computing in space. In this paper, we focus on the Xilinx Zynq UltraScale+ EG Heterogeneous MPSoC, which is composed of four different processing elements (PE): a dual-core Cortex-R5, a quad-core ARM Cortex-A53, a graphics processing unit (GPU) and a high end FPGA. Proper use of the heterogeneity and the different levels of parallelism of this platform becomes a challenging task. This paper evaluates this platform and each of its PEs to carry out fundamental operations in terms of computational performance. To this end, we evaluate image-based applications and a matrix multiplication kernel. On former, the image-based applications leverage the heterogeneity of the MPSoc and strategically distributes its tasks among both kinds of CPU cores and the FPGA. On the latter, we analyze separately each PE using different matrix multiplication benchmarks in order to assess and compare their performance in terms of MFlops. This kind of operations are being carried out for example in a large number of space-related applications where the MPSoCs are currently gaining momentum. Results stand out the fact that different PEs can collaborate efficiently with the aim of accelerating the computational-demanding tasks of an application. Another important aspect to highlight is that leveraging the parallel OpenBLAS library we achieve up to 12 GFlops with the four Cortex-A53 cores of the platform, which is a considerable performance for this kind of devices.

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A Raspberry Pi Cluster Instrumented for Fine-Grained Power Measurement

Cited by 43 publications

References 24 publications

High-Performance Embedded Computing in Space: Evaluation of Platforms for Vision-Based Navigation

High-Performance Embedded Computing in Space: Evaluation of Platforms for Vision-Based Navigation

Image Processing on Raspberry Pi Cluster

Evaluating the computational performance of the Xilinx Ultrascale+ EG Heterogeneous MPSoC

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