A Reachability Analysis of RT-LOTOS Specifications

Courtiat, Jean-Pierre; Oliveira, Roberto C. de

doi:10.1007/978-0-387-34945-9_9

Cited by 12 publications

(10 citation statements)

References 3 publications

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“…As detailed in [7], the reachability analysis of RT-Lotos specifications is carried out as follows: An RT-Lotos specification is first translated into a DTA -Dynamic Timed Automaton; reachability analysis is then applied to the DTA relying on a minimization algorithm [18] that generates a minimal reachability graph, which describes the global behavior of the RT-Lotos specification.…”

Section: Rt-lotos Reachability Analysismentioning

confidence: 99%

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From the Specification to the Scheduling of Time-Dependent Systems

Lohr¹,

Courtiat²

2002

Lecture Notes in Computer Science

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This paper introduces and formalizes a new variant of Timed Automata, called Time Labeled Scheduling Automata. A Time Labeled Scheduling Automaton is a single clock implementation model expressing globally the time constraints that a system has to meet. An algorithm is presented to show how a Time Labeled Scheduling Automaton can be synthesized from a minimal reachability graph derived from a high-level specification expressing the composition of different time constraints. It is shown how the reachability graph may be corrected before synthesizing the Time Labeled Scheduling Automaton to remove all its potentially inconsistent behaviors. Current applications of the model are the scheduling of interactive multimedia documents and a simple illustration is given in this area.

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Section: Rt-lotos Reachability Analysismentioning

confidence: 99%

“…The formal definition of a minimal reachability graph and the way it may be derived from a DTA are presented in [7].…”

Section: Rt-lotos Reachability Analysismentioning

confidence: 99%

From the Specification to the Scheduling of Time-Dependent Systems

Lohr¹,

Courtiat²

2002

Lecture Notes in Computer Science

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“…The general way to proceed is not original , but the specific method implemented in RTL presents several advantages: (i) it permits to minimize the number of clocks in each control state of the timed automaton, thanks to the definition of the DTA (Dynamic Timed Automata) model, and (ii) reachability analysis is performed on the fly when generating the DTA model from the RT-LOTOS specification (see (Cd095] for details). Both advantages are important from a practical point of view, since the complexity of verification algorithms developed for timed automata depends directly on the number of clocks [YL93] .…”

Section: Rtl Verification Capabilitiesmentioning

confidence: 99%

An experiment in using RT-LOTOS for the formal specification and verification of a distributed scheduling algorithm in a nuclear power plant monitoring system

Andriantsiferana¹,

Courtiat²,

Oliveira³

et al. 1997

Formal Description Techniques and Protocol Specification, Testing and Verification

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The paper relates an industrial experiment performed jointly by LAAS-CNRS and Electricite de France (EdF in short) for assessing the application of a formal method to the reverse engineering of (a part of) a fault-tolerant monitoring system designed for the control room of French N4 nuclear power plants. More specifically, the experiment is devoted to the formal specification and verification of the distributed scheduling algorithm managing the hot redundancy between the two computers composing the system, a single fault hypothesis being assumed for this function. The formal method used for the experiment is RT-LOTOS, a temporal extension of the LOTOS standard Formal Description Technique (FDT in short) . The main motivation behind the experiment was to get a better understanding of the fault-tolerant features of the scheduling algorithm by means of both simulation and formal verification.

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“…The tool first generates a Dynamic Timed Automaton (DTA [8]). The later is a labelled timed automaton which distinguishes between urgent and non urgent actions.…”

Section: Introductionmentioning

confidence: 99%

From RT-LOTOS to time Petri nets new foundations for a verification platform

Sadani

Courtiat

Saqui-Sannes

2005

Third IEEE International Conference on Software Engineering and Formal Methods (SEFM'05)

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The formal description technique RT-LOTOS has been selected as intermediate language to add formality to a real-time UML profile named TURTLE. For this sake, an RT-LOTOS verification platform has been developed for early detection of design errors in real-time system models. The paper discusses an extension of the platform by inclusion of verification tools developed for Time Petri Nets. The starting point is the definition of RT-LOTOS to TPN translation patterns. In particular, we introduce the concept of components embedding Time Petri Nets. The translation patterns are implemented in a prototype tool which takes as input an RT-LOTOS specification and outputs a TPN in the format admitted by the TINA tool. The efficiency of the proposed solution has been demonstrated on various case studies.

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A Reachability Analysis of RT-LOTOS Specifications

Cited by 12 publications

References 3 publications

From the Specification to the Scheduling of Time-Dependent Systems

From the Specification to the Scheduling of Time-Dependent Systems

An experiment in using RT-LOTOS for the formal specification and verification of a distributed scheduling algorithm in a nuclear power plant monitoring system

From RT-LOTOS to time Petri nets new foundations for a verification platform

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