A reconfigurable analog baseband for low-power Wi-Fi receiver

Hao, Jiachen; Zheng, Sifa; Chi, Baoyong

doi:10.1109/asicon.2015.7516969

Cited by 4 publications

(3 citation statements)

References 4 publications

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“…The transfer function of the PGA can be expressed as (1), where 𝐴 𝑉1 and 𝜔 0_𝑃𝐺𝐴 represent the gain and cutoff frequency of the PGA. The transfer function of the LPF can be expressed as (3), where 𝐴 𝑉2 , 𝜔 0_𝐹𝐼𝐿𝑇𝐸𝑅 and 𝑄 represent the gain, cutoff frequency and quality factor of the LPF, respectively [10]. (3)…”

Section: Abb Topologiesmentioning

confidence: 99%

A Reconfigurable Analog Baseband for Multistandard Wireless Receivers in 22-nm CMOS

Huang,

2023

J. Phys.: Conf. Ser.

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This paper presents a low noise, and high linearity reconfigurable receiver (RX) analog baseband (ABB) with tunable bandwidth (BW) and gain for multi-standard applications. The designed ABB consists of a programmable gain amplifier (PGA) and a second-order active RC low-pass filter (LPF) with cutoff frequency range from 0.7 MHz–10 MHz, whereas the gain could be tuned between 0 dB and 49 dB. The proposed ABB is implemented in 22 nm CMOS process. The post-simulation results show that the current consumption is 3.36 mA from 1 V supply and the area occupies 571×328 μm 2. The ABB achieves 42.8 dBm in-band third-order harmonic intercept point (IIP3). The spurious-free dynamic range (SFDR) and in-band total harmonic distortion (THD) is 83.2 dBc and is -83.1 dB, respectively. The input referred in-band integrated noise (IRN) is 144.8 μVrms . A digital DCOC is used to calibrate the output DC level.

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Section: Abb Topologiesmentioning

confidence: 99%

A Reconfigurable Analog Baseband for Multistandard Wireless Receivers in 22-nm CMOS

Huang,

2023

J. Phys.: Conf. Ser.

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“…As shown in Figure 8, the pseudo differential structure is used for the VGAs for infinite input impedance. Gain steps of VGA1, VGA2, and VGA3 are 4 dB, 2 dB, and 1 dB, respectively [15]. The VGAs use a differential to a single two-stage amplifier.…”

Section: Building Blocksmentioning

confidence: 99%

“…Center frequency of the complex BPF is 1 MHz and 3-dB bandwidth is 1.2 MHz. Image frequency rejection ratios is 36 dB [15].…”

Section: Building Blocksmentioning

confidence: 99%

A Fully Integrated Bluetooth Low-Energy Transceiver with Integrated Single Pole Double Throw and Power Management Unit for IoT Sensors

Kim

et al. 2019

Sensors

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This paper presents a low power Gaussian Frequency-Shift Keying (GFSK) transceiver (TRX) with high efficiency power management unit and integrated Single-Pole Double-Throw switch for Bluetooth low energy application. Receiver (RX) is implemented with the RF front-end with an inductor-less low-noise transconductance amplifier and 25% duty-cycle current-driven passive mixers, and low-IF baseband analog with a complex Band Pass Filter(BPF). A transmitter (TX) employs an analog phase-locked loop (PLL) with one-point GFSK modulation and class-D digital Power Amplifier (PA) to reduce current consumption. In the analog PLL, low power Voltage Controlled Oscillator (VCO) is designed and the automatic bandwidth calibration is proposed to optimize bandwidth, settling time, and phase noise by adjusting the charge pump current, VCO gain, and resistor and capacitor values of the loop filter. The Analog Digital Converter (ADC) adopts straightforward architecture to reduce current consumption. The DC-DC buck converter operates by automatically selecting an optimum mode among triple modes, Pulse Width Modulation (PWM), Pulse Frequency Modulation (PFM), and retention, depending on load current. The TRX is implemented using 1P6M 55-nm Complementary Metal–Oxide–Semiconductor (CMOS) technology and the die area is 1.79 mm2. TRX consumes 5 mW on RX and 6 mW on the TX when PA is 0-dBm. Measured sensitivity of RX is −95 dBm at 2.44 GHz. Efficiency of the DC-DC buck converter is over 89% when the load current is higher than 2.5 mA in the PWM mode. Quiescent current consumption is 400 nA from a supply voltage of 3 V in the retention mode.

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Programmable Gain and Bandwidth Op-Amp Using Controllable Input Stage Tail Current

Zaidi

Grout

A’ain

2018

2018 International Electrical Engineering Congress (iEECON)

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A reconfigurable analog baseband for low-power Wi-Fi receiver

Cited by 4 publications

References 4 publications

A Reconfigurable Analog Baseband for Multistandard Wireless Receivers in 22-nm CMOS

A Reconfigurable Analog Baseband for Multistandard Wireless Receivers in 22-nm CMOS

A Fully Integrated Bluetooth Low-Energy Transceiver with Integrated Single Pole Double Throw and Power Management Unit for IoT Sensors

Programmable Gain and Bandwidth Op-Amp Using Controllable Input Stage Tail Current

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