2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) 2014
DOI: 10.1109/newcas.2014.6934083
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A reconfigurable buck-boost switched capacitor converter architecture for multiple, distributed on-chip load applications

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Cited by 3 publications
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“…For future iterations of this power converter, size optimization of the power transistors in the SC circuit can be used to improve the effective output resistance for each gain ratio used in the system. Further work has already been done since this iteration to provide finer control in load regulation using a novel DFS scheme [ 28 ].…”
Section: Resultsmentioning
confidence: 99%
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“…For future iterations of this power converter, size optimization of the power transistors in the SC circuit can be used to improve the effective output resistance for each gain ratio used in the system. Further work has already been done since this iteration to provide finer control in load regulation using a novel DFS scheme [ 28 ].…”
Section: Resultsmentioning
confidence: 99%
“…The quiescent current consumption of the SC converter can range between 0.2 to 0.8 mA depending on the load, as shown in Figure 11 ; this is acceptable for our intended application and within the current amount that can be supplied by the M24LR16E-R chip energy-harvester chip. Some minor changes have also been made to the SC converter system to further reduce static power consumption and these changes have already been implemented for the future prototype [ 5 , 28 ].…”
Section: Resultsmentioning
confidence: 99%
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