A Reconfigurable TAF-DPS Frequency Synthesizer on FPGA Achieving 2 ppb Frequency Granularity and Two-Cycle Switching Speed

Xiu, Liming; Chen, Pao-Lung

doi:10.1109/tie.2016.2611490

Cited by 19 publications

(4 citation statements)

References 17 publications

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“…The first circuit technique to implement the TAF-DPS principle is Flying-Adder frequency synthesis architecture, developed around the late 1990s [27][28]. Selected examples of recent development can be found in [29][30][31]. Over the years, it has been used in a variety of commercial products.…”

Section: Brief Review On Taf-dpsmentioning

confidence: 99%

“…For high-performance designs, the circuit shall be created by using transistor-level custom approach [29][30]. For low-cost cases, it can be implemented by using the digital design approach of HDL-synthesis and automatic place & route [31][32].…”

Section: Brief Review On Taf-dpsmentioning

confidence: 99%

“…One of those is to use 16 cross-coupled NAND2 gates that are directly instantiated from an ASIC standard cell library [32]. In another solution, a group of 16 signals is generated from a divider (e.g., Johnson counter), which is made of 8 serially connected flip-flops [31]. Fig.…”

Section: Brief Review On Taf-dpsmentioning

confidence: 99%

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A New Perspective of Flexible Clocking Ideology for Driving and Devising Circuits in Emerging Resource-Constrained Applications

Wei

Xiu

2022

IEEE Access

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Clock is the most important signal in electronic system. In current practice, the dominant clocking style is the fixed-frequency approach. For a given application, the clock signal is only required to work at a few selected frequencies. Moreover, in the process of performing a task, it must not change its frequency. This style has worked well in the past. However, it is preventing information processing efficiency from being raised to next level. Worse yet, the emergence of resource-constrained applications, such as edge computing and IoT, can render this approach unserviceable. In this paper, a new perspective of flexible clocking ideology is advocated. It promotes the use of a clock generator, TAF-DPS, that possesses features of "arbitrary frequency generation" and "instantaneous frequency switching". Owing to its superior capability in synthesizing waveform, TAF-DPS can handle many signal processing problems in a more elegant manner and serve some special purposes more efficiently. Further, it can be used for generating data for security purposes. TAF-DPS is especially applicable for environments with large frequency instability, which is a major problem in resource-constrained applications. The contribution of this paper is the advocacy of a new perspective of flexible clocking. This ideology is gradually developed in this paper as the argument is carried out through examples of novel architectures enabled by TAF-DPS. The perspective naturally emerges from the collective effect of those novel architectures. The large number of emerging applications, exemplified by edge computing and IoT, inspire system-level innovations that inevitably present new challenges to circuitlevel. Those challenges are so demanding that they require overhaul in our circuit design philosophy. This new perspective is such an overhaul in fundamental level. Its aim is to answer the challenges, for better serving the emerging demands in higher levels.

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Section: Brief Review On Taf-dpsmentioning

confidence: 99%

Section: Brief Review On Taf-dpsmentioning

confidence: 99%

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A New Perspective of Flexible Clocking Ideology for Driving and Devising Circuits in Emerging Resource-Constrained Applications

Wei

Xiu

2022

IEEE Access

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“…A particular circuit technique to implement TAF-DPS is Flying-Adder frequency synthesis architecture whose first circuit was developed over a decade ago [6][7]. A recent example can be found in [8]. Over the years, it has been used in many commercial products as frequency synthesizer for generating clock frequency.…”

Section: Brief Review Of Taf-dpsmentioning

confidence: 99%

P‐48: A Novel “Always‐on” Spread Spectrum Clock Technique for Reducing EMI in Display Electronics

Wei

Xiu

2019

Symp Digest of Tech Papers

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Spread Spectrum Clock Generation (SSCG) is an important technique for EMI reduction. It is especially applicable for display electronics since modern society is increasingly equipped with growing number of myriad types of semiconductor display devices. To achieve the goal of lowering peak power, clock signal is intentionally "jittered". This fact negatively impacts the clock signal integrity. For this reason, the common practice nowadays in industry is to turn off the SSCG function in normal work mode. It is only turned on when the device is actively tested for EMI influence in the lab. In this paper, a novel SSCG technique is presented. It is based on the emerging frequency synthesis technique of Time-Average-Frequency Direct Period Synthesis. Its aim is to maximize frequency modulation depth while precisely controls clock's impact on system operation so that the SSCG function can be "always-on".

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Response to the Space Crisis

Xiu

2022

The Turn of Moore’s Law From Space to Time

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A Reconfigurable TAF-DPS Frequency Synthesizer on FPGA Achieving 2 ppb Frequency Granularity and Two-Cycle Switching Speed

Cited by 19 publications

References 17 publications

A New Perspective of Flexible Clocking Ideology for Driving and Devising Circuits in Emerging Resource-Constrained Applications

A New Perspective of Flexible Clocking Ideology for Driving and Devising Circuits in Emerging Resource-Constrained Applications

P‐48: A Novel “Always‐on” Spread Spectrum Clock Technique for Reducing EMI in Display Electronics

Response to the Space Crisis

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