A Rectification Hardware Architecture for an Adaptive Multiple-Baseline Stereo Vision System

Son, Hyeon-Sik; Bae, Kyeong-ryeol; Ok, Seung-Ho; Lee, Yong-Hwan; Moon, Byungin

doi:10.1007/978-3-642-27192-2_19

Cited by 6 publications

(7 citation statements)

References 5 publications

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“…The correspondence of a pixel at coordinate (x, y) of the reference image, can be found at the same vertical coordinate y, within a maximum horizontal bound called the disparity range [0, D) in the target image [Son et al 2012]. The location difference of corresponding pixels in both images is called disparity and is used to calculate the depth in meters.…”

Section: Disparity Estimation: Algorithm Implementation and Verificamentioning

confidence: 99%

Runtime Performance and Power Optimization of Parallel Disparity Estimation on Many-Core Platforms

Leech

Kumar

Acharyya

et al. 2017

ACM Trans. Embed. Comput. Syst.

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This paper investigates the use of many-core systems to execute the disparity estimation algorithm, used in stereo vision applications, as these systems can provide flexibility between performance scaling and power consumption. We present a learning-based run-time management approach which achieves a required performance threshold whilst minimizing power consumption through dynamic control of frequency and core allocation. Experimental results are obtained from a 61-core Intel Xeon Phi platform for the above investigation. The same performance can be achieved with an average reduction in power consumption of 27.8% and increased energy efficiency by 30.04% when compared to DVFS control alone without run-time management.

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Section: Disparity Estimation: Algorithm Implementation and Verificamentioning

confidence: 99%

Runtime Performance and Power Optimization of Parallel Disparity Estimation on Many-Core Platforms

Leech

Kumar

Acharyya

et al. 2017

ACM Trans. Embed. Comput. Syst.

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“…The hardware architecture of [7] requires a significant amount of hardware resources to support complex operations for solving the lens distortion models. Hardware architectures of look-up-table based implementations [8] and [9] require a significant amount of resources to implement external memory (E.M.) controller.…”

Section: Implementation Resulmentioning

confidence: 99%

“…Hardware architectures of look-up-table based implementations [8] and [9] require a significant amount of resources to implement external memory (E.M.) controller. Hence, combining CLUT-R with BRAM controller consumes less LUT and DFF resources than [7][8][9]. The DFF and LUT consumption of [10] is not available (NA).…”

Section: Implementation Resulmentioning

confidence: 99%

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Compressed look-up-table based real-time rectification hardware

Akın

Baz

Gaemperle

et al. 2013

2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC)

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Abstract-Stereo image rectification is a pre-processing step of disparity estimation intended to remove image distortions and to enable stereo matching along an epipolar line. A real-time disparity estimation system needs to perform real-time rectification which requires solving the models of lens distortions, image translations and rotations. Look-up-table based rectification algorithms allow image rectification without demanding high complexity operations. However, they require an external memory to store large size look-up-tables. In this work, we present an intermediate solution that compresses the rectification information to fit the look-up-table into the onchip memory of a Virtex-5 FPGA. The low-complexity decompression process requires a negligible amount of hardware resources for its real-time implementation. The proposed image rectification hardware consumes 0.28% of the DFF and 0.32% of the LUT resources of the Virtex-5 XCUVP-110T FPGA, it can process 347 frames per second for a 1024×768 pixels image resolution, and it does not need the availability of an external memory.

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“…In a system that processes the disparity estimation in real-time, image rectification should also be performed in real-time. The rectification hardware implementation presented in [7] solves the complex equations that model distortion, and consumes a significant amount of hardware resources.…”

Section: Introductionmentioning

confidence: 99%

Enhanced Compressed Look-up-Table Based Real-Time Rectification Hardware

Akın

Gaemperle

Najibi

et al. 2015

IFIP Advances in Information and Communication Technology

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International audienceReal-time disparity estimation requires real-time rectification which involves solving the models of lens distortions, image translations and rotations. Low complexity look-up-table based rectification algorithms usually require an external memory to store large look-up-tables. In this chapter, we present an implementation of the look-up-table based approach which compresses the rectification information to fit the look-up-table into the on-chip memory of a Virtex-5 FPGA. First, a very low complexity compressed look-up-table based rectification algorithm (CLUTR) and its real-time hardware are presented. The implemented CLUTR hardware rectifies stereo images with moderate lens distortion and camera misalignment. Moreover, an enhanced version of the compressed look-up-table based rectification algorithm (E-CLUTR) and its novel real-time hardware are presented. E-CLUTR solves more extreme camera alignment and distortion issues than CLUTR while maintaining the low complexity architecture

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A Rectification Hardware Architecture for an Adaptive Multiple-Baseline Stereo Vision System

Cited by 6 publications

References 5 publications

Runtime Performance and Power Optimization of Parallel Disparity Estimation on Many-Core Platforms

Runtime Performance and Power Optimization of Parallel Disparity Estimation on Many-Core Platforms

Compressed look-up-table based real-time rectification hardware

Enhanced Compressed Look-up-Table Based Real-Time Rectification Hardware

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