A reduction recovery algorithm for frequency-domain layered finite element analysis of large-scale high-frequency integrated circuits

Abstract

IntroductionHigh-frequency digital, mixed-signal, and RF IC design demands accurate fullwave analysis for pre-layout design optimization and post-layout performance verification. However, traditional full-wave modeling techniques suffer from the well-known problems of large memory requirement and long CPU run time. Although efficient algorithms have been studied to mitigate this problem [1], very large-scale IC design (1) demands very large-scale electromagnetic (EM) solutions, which cannot be offered by many current computational EM techniques, and (2) imposes many unique modeling challenges that are totally new to the EM community [2]. Therefore, it is of critical importance to develop high-capacity EM methods amenable for ICs to drive continual VLSI revolution.