A Review of Low-Power Static Random Access Memory (SRAM) Designs

Rathi, Neelmani; Kumar, Amit; Gupta, Neeraj; Singh, Sanjay Kumar

doi:10.1109/devic57758.2023.10134887

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A Review of Low-Power Static Random Access Memory (SRAM) Designs

Cited by 5 publications

References 10 publications

Optimized Speed and Power Consumption in a 14T SRAM Bit Cell by Use of Shorted-Gate FinFET

Optimized Speed and Power Consumption in a 14T SRAM Bit Cell by Use of Shorted-Gate FinFET

Design and Implementation of Synchronous Dual-Port Memory

SRAM PUFs: A Study of Aging Impact and Potential Mitigation

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