A review of selective area grown recess structure for insulated-gate E-mode GaN transistors

Abstract

Recess structure is one of the main schemes for insulated-gate E-mode GaN transistors. In this work, selective area growth (SAG) is proposed to fabricate damage-free recess-gate device, and related progresses regarding process optimization and structure evolution have been reviewed. Firstly, the SAG process has been optimized by interface separation (conduction interface and regrowth interface) and n-type Si impurity removal to achieve high-quality AlGaN/GaN heterostructure. Compared to the traditional etching method, the feasibility and superiority of SAG scheme are demonstrated for realizing E-mode Al2O3/GaN MISFET with small Vth hysteresis. Then, by inserting an in situ AlN interlayer, the SAG Al2O3/AlN/GaN MISFET yields improved frequency dispersion and gate channel conduction performances. To further enhance the channel conduction, the SAG partially recess-gate Al2O3/AlGaN/GaN MIS-HFET structure is proposed, by which both high Vth and high-field-effect channel mobility have been achieved. Those results indicate that SAG method gives a perspective way for insulated-recess-gate GaN transistors fabrication.

Recent Advances in GaN‐Based Power HEMT Devices

“…Finally, the SiO 2 mask is removed by BOE, the source/drain metal, gate dielectric and gate metal are successively deposited to fabricate a normally‐off GaN‐HEMTs. [ 122,123 ] Due to the absence of etching process on the recess region, the lattice damage and interface traps are greatly reduced, which contributes to enhance the channel conduction. Recent works of the regrown‐barrier GaN HEMTs are summarized in Table 2 .…”

MISHEMT intrinsic voltage gain under multiple channel output characteristics

“…the interface of AlGaN/GaN, even though it usually generates a normally-on transistor. In addition, normally-off GaN-based transistors provide promising possibilities for digital circuits applications operating at high temperatures [6].…”