A Review on SEU Mitigation Techniques for FPGA Configuration Memory

Nidhin, T. S.; Bhattacharyya, Anindya; Behera, R. P.; Jayanthi, T.

doi:10.1080/02564602.2016.1265905

Cited by 19 publications

(4 citation statements)

References 28 publications

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“…Qualitative and quantitative comparison of techniques are also described in previously referenced contributions using similar (e.g., fault coverage, error coverage) but not always equivalent concepts with respect to IEC 61508 requirements for DC, thus not enabling a direct quantitative comparison of described techniques. Finally, an equivalent approach has been taken with respect to FPGA technology, where several research surveys [50,51,52] provide a comprehensive state-of-the-art of mitigation techniques, design standards and fault-tolerant methodologies for FPGAs.…”

Section: Discussionmentioning

confidence: 99%

“…FPGAs SRAM FPGAs use a configuration memory that defines the operations of the electronic circuit implemented by the FPGA. Different hardening techniques can be used to tolerate and mitigate soft and transient errors that could lead to a modification of the intended circuit implementation, e.g., redundancy, scrubbing, partial dynamic reconfiguration, combinations of the previous techniques [50,51,52]. On the other hand, antifuse based FPGAs provide higher reliability than SRAM FPGAs, but their higher cost and lack of reprogrammability limits their application outside the aerospace domain.…”

Section: Reliabilitymentioning

confidence: 99%

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Multi-core Devices for Safety-critical Systems

et al. 2020

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Multi-core devices are envisioned to support the development of next-generation safety-critical systems, enabling the on-chip integration of functions of different criticality. This integration provides multiple system-level potential benefits such as cost, size, power, and weight reduction. However, safety certification becomes a challenge and several fundamental safety technical requirements must be addressed, such as temporal and spatial independence, reliability, and diagnostic coverage. This survey provides a categorization and overview at different device abstraction levels (nanoscale, component, and device) of selected key research contributions that support the compliance with these fundamental safety requirements.

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Section: Discussionmentioning

confidence: 99%

Section: Reliabilitymentioning

confidence: 99%

Multi-core Devices for Safety-critical Systems

et al. 2020

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“…State machines can be hardened by assuring a lock-up-free behavior in case an invalid state is generated by SEE. 334 (ii) The qualification of components by accelerated and nonaccelerated irradiation tests in comparable radiation fields. The latter is the method of choice for the qualification of custom-off-the-shelf (COTS) components, which marks a popular approach in modern space system designs.…”

Section: Review Scitationorg/journal/rsimentioning

confidence: 99%

Ion thrusters for electric propulsion: Scientific issues developing a niche technology into a game changer

Holste

Dietz

Scharmann

et al. 2020

Review of Scientific Instruments

135

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The transition from OLD SPACE to NEW SPACE along with increasing commercialization has a major impact on space flight, in general, and on electric propulsion (EP) by ion thrusters, in particular. Ion thrusters are nowadays used as primary propulsion systems in space. This article describes how these changes related to NEW SPACE affect various aspects that are important for the development of EP systems. Starting with a historical overview of the development of space flight and of the technology of EP systems, a number of important missions with EP and the underlying technologies are presented. The focus of our discussion is the technology of the radio frequency ion thruster as a prominent member of the gridded ion engine family. Based on this discussion, we give an overview of important research topics such as the search for alternative propellants, the development of reliable neutralizer concepts based on novel insert materials, as well as promising neutralizer-free propulsion concepts. In addition, aspects of thruster modeling and requirements for test facilities are discussed. Furthermore, we address aspects of space electronics with regard to the development of highly efficient electronic components as well as aspects of electromagnetic compatibility and radiation hardness. This article concludes with a presentation of the interaction of EP systems with the spacecraft.

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“…However, from the current domestic and international literature, the relevant research primarily focuses on hardening techniques and circuit-level SEE effects, such as SEE-resistant design and optimisation for Static Random-Access Memory (SRAM) and inverter chains [11][12][13][14][15][16].…”

Section: Introductionmentioning

confidence: 99%

A New Type of Si-Based MOSFET for Radiation Reinforcement

Liu,

Zhou,

Zhang

et al. 2024

Micromachines

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This paper thoroughly analyses the role of drift in the sensitive region in the single-event effect (SEE), with the aim of enhancing the single-particle radiation resistance of N-type metal-oxide semiconductor field-effect transistors (MOSFETs). It proposes a design for a Si-based device structure that extends the lightly doped source–drain region of the N-channel metal-oxide semiconductor (NMOS), thereby moderating the electric field of the sensitive region. This design leads to a 15.69% decrease in the charge collected at the leaky end of the device under the standard irradiation conditions. On this basis, a device structure is further proposed to form a composite metal-oxide semiconductor (MOS) by connecting a pn junction at the lightly doped source–drain end. By adding two charge paths, the leakage collection charge is further reduced by 13.85% under standard irradiation conditions. Moreover, the deterioration of the drive current in the purely growing lightly doped source–drain region can be further improved. Simulations of single-event effects under different irradiation conditions show that the device has good resistance to single-event irradiation, and the composite MOS structure smoothly converges to a 14.65% reduction in drain collection charge between 0.2 pC/μm and 1 pC/μm Linear Energy Transfer (LET) values. The incidence position at the source-to-channel interface collects the highest charge reduction rate of 28.23%. The collecting charge reduction rate is maximum, at 17.12%, when the incidence is at a 45-degree angle towards the source.

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A Review on SEU Mitigation Techniques for FPGA Configuration Memory

Cited by 19 publications

References 28 publications

Multi-core Devices for Safety-critical Systems

Multi-core Devices for Safety-critical Systems

Ion thrusters for electric propulsion: Scientific issues developing a niche technology into a game changer

A New Type of Si-Based MOSFET for Radiation Reinforcement

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