A Run-Time Reconfiguration Method for an FPGA-Based Electrical Capacitance Tomography System

Abstract

A desirable feature of an electrical capacitance tomography system is the adaptation possibility to any sensor configuration and measurement mode. A run-time reconfiguration of a system for electrical capacitance tomography is presented. An original mechanism is elaborated to reconfigure, on the fly, a modular EVT4 system with multiple FPGAs installed. The outlined system architecture is based on FPGA programmable logic devices (Xilinx Spartan) and PicoBlaze soft-core processors. Soft-core processors are used for communication, measurement control and data preprocessing. A novel method of FPGA partial reconfiguration is described, in which a PicoBlaze soft-core processor is used as a reconfiguration controller. Behavioral reconfiguration of the system is obtained by providing run-time access to the program code of a soft-core control processor. The tests using EVT4 hardware and different algorithms for tomographic scanning were performed. A test object was measured using 2D and 3D sensors. The time and resources required for the examined reconfiguration procedure are evaluated.

Image reconstruction using Z-axis spatio-temporal sampling in 3D electrical capacitance tomography

“…However, in the device used in our laboratory [28], the data-sampling rate is one of the parameters of the algorithm controlling the data acquisition. The speed of data acquisition can easily be changed on the fly due to the application of a run-time dynamic reconfiguration technology [46]. Another method of adapting the reconstruction algorithm to changing velocity is to update the extended sensitivity matrix on the fly.…”