2018
DOI: 10.1016/j.micpro.2017.12.007
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A scalable and adaptable hardware NoC-based self organizing map

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Cited by 21 publications
(21 citation statements)
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“…From the results of Table 4, it should be noted that the SSOM hardware architecture is relatively competitive compared to other more recent architectures. In addition, unlike parallel SOM architectures [8, 17, 18], SSOM is adaptive, based on the sequencing of the specific SOM operations. The latter will be performed concurrently in each neuroprocessor that will constitute the SOM network.…”
Section: Results Of Implementation Of Ssom Architecturementioning
confidence: 99%
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“…From the results of Table 4, it should be noted that the SSOM hardware architecture is relatively competitive compared to other more recent architectures. In addition, unlike parallel SOM architectures [8, 17, 18], SSOM is adaptive, based on the sequencing of the specific SOM operations. The latter will be performed concurrently in each neuroprocessor that will constitute the SOM network.…”
Section: Results Of Implementation Of Ssom Architecturementioning
confidence: 99%
“…Configurable hardware appears well adapted to obtain efficient and flexible neural network implementation. Several SOM implementations on FPGA supports have been proposed [1118]. Indeed, Porrmann et al in [11] successfully implemented, on a Virtex FPGA support, a reconfigurable SIMD architecture of an SOM network formed by a processing element (PE).…”
Section: Introductionmentioning
confidence: 99%
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“…To the best of our knowledge, no work has been carried out to reduce the time required for each iteration. This can be partially explained by the highly parallel nature of the computations inside each iterations, in so far as when a fast real world implementation is required, parallel solutions are proposed, like the use of an FPGA substrate with each neuron having its own circuitry, as in [1] and in [6]. However, parallel solutions should not lead to a lack of effort in optimizing the algorithms, as the majority of SOM training is performed on CPU, and parallel hardware can be costly and difficult to program.…”
Section: Introductionmentioning
confidence: 99%
“…Abadi et al (2018). Todos os trabalhos apresentam algumas modificações no algoritmo de computação neural, em relação às execuções tradicionais em software, com o propósito de torná-lo adequado para uma implementação direta e eficiente no chip.Porém, constatou-se que tais modificações são frequentemente apresentadas na literatura sem que haja referência às premissas teóricas que fundamenta o modelo neural.…”
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