A searching method for optimal locations of decoupling capacitors based on electromagnetic field analysis by FDTD method

Hattori, I.; Kamo, Atsushi; Watanabe, Takayuki; Asai, Hideki

doi:10.1109/epep.2002.1057905

Cited by 7 publications

(2 citation statements)

References 10 publications

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“…For example, the authors of [10] use the PEEC model and model order reduction techniques to compute the input impedance and then search for the optimal locations of the decoupling capacitors to minimize the impedance by gradient based search. In [11] the authors use FDTD and FFT to obtain frequency dependent Poynting vector and decoupling capacitors are iteratively put at the port with maximum Poynting vector. However, in both papers the decoupling capacitor value is fixed and ESL or ESR is not considered.…”

Section: Introductionmentioning

confidence: 99%

Noise driven in-package decoupling capacitor optimization for power integrity

2006

Proceedings of the 2006 International Symposium on Physical Design

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The existing decoupling capacitance optimization approaches meet constraints on input impedance for package. In this paper, we show that using impedance as constraints leads to large overdesign and then develop a noise driven optimization algorithm for decoupling capacitors in packages for power integrity. Our algorithm uses the simulated annealing algorithm to minimize the total cost of decoupling capacitors under the constraints of a worst case noise. The key enabler for efficient optimization is an incremental worst-case noise computation based on FFT over incremental impedance matrix evaluation. Compared to the existing impedance based approaches, our algorithm reduces the decoupling capacitor cost by 3× and is also more than 10× faster even with explicit noise computation.

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Section: Introductionmentioning

confidence: 99%

Noise driven in-package decoupling capacitor optimization for power integrity

2006

Proceedings of the 2006 International Symposium on Physical Design

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“…(For a representative sample of the literature, the reader is referred to [2]- [4] and references therein.) In printed-circuit-board (PCB) technology, the most common approach of mitigating SSN consists of using discrete decoupling capacitors around sensitive integrated circuits [4]- [9], whereby most of the recent work has focused Manuscript received April 19, 2004 on optimizing the number and the location of these capacitors on the PCB. These capacitors are usually connected between the power and the ground planes and are expected to behave as a short circuit between the two planes at high frequencies.…”

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confidence: 99%

Design and Modeling of High-Impedance Electromagnetic Surfaces for Switching Noise Suppression in Power Planes

Kamgaing

Ramahi

2005

IEEE Trans. Electromagn. Compat.

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Abstract-This paper presents a detailed design and modeling approach for power planes with integrated high-impedance electromagnetic surfaces (HIS). These novel power planes, which were introduced recently, have the unique ability of providing effective broadband simultaneous switching noise (SSN) mitigation. Fullwave electromagnetic simulation is used to study the impact of the geometry on the performance of these novel power planes. It is demonstrated that power planes using inductance-enhanced HIS can be designed for broadband mitigation of the SSN from the upper hundred megahertz to the gigahertz frequencies. Physicsbased compact models for the unit cell of power planes with integrated HIS are developed and several of them connected in a two-dimensional array to build full models for large and multilayer power planes. The compact model offers fast analysis of power planes. As an example, we show that the full-wave simulation time of a 10 × 10 cm power plane with integrated HIS can be dramatically reduced from 24 to 48 h using a commercially available three-dimensional full-wave solver to less than 1 min when using the compact circuit model developed here.

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IC-Package-System Integration Design

Shi

Shang

et al. 2013

Advanced Flip Chip Packaging

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A searching method for optimal locations of decoupling capacitors based on electromagnetic field analysis by FDTD method

Cited by 7 publications

References 10 publications

Noise driven in-package decoupling capacitor optimization for power integrity

Noise driven in-package decoupling capacitor optimization for power integrity

Design and Modeling of High-Impedance Electromagnetic Surfaces for Switching Noise Suppression in Power Planes

IC-Package-System Integration Design

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