A Self-Testing Platform with a Foreground Digital Calibration Technique for SAR ADCs

Juan, Yi Hsiang; Huang, Hong; Lee, Shuenn-Yuh; Lai, Shin Chi; Juang, Wen Ho; Luo, Ching Hsing

doi:10.3390/app6080217

Cited by 2 publications

(2 citation statements)

References 12 publications

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“…Li et al, in 2019, presented a linearity test and calibration method that can be applied to all types of ADCs [23]. A self-testing platform with digital calibration technique for SAR ADCs was proposed by Juan et al in 2016 that improves SNR with a sampling frequency of 18.75 kHz [24]. Hernández-Gutiérrez et al, in 2023, presented a low-cost embedded system for high-energy radiation detection applications that is able to detect alfa particles and send the nuclear detection events to a server in the cloud [25].…”

Section: Introductionmentioning

confidence: 99%

Efficient and Accurate Analog Voltage Measurement Using a Direct Sensor-to-Digital Port Interface for Microcontrollers and Field-Programmable Gate Arrays

Grossi

2024

Sensors

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Portable sensor systems are usually based on microcontrollers and/or Field-Programmable Gate Arrays (FPGAs) that are interfaced with sensors by means of an Analog-to-Digital converter (ADC), either integrated in the computing device or external. An alternative solution is based on the direct connection of the sensors to the digital input port of the microcontroller or FPGA. This solution is particularly interesting in the case of devices not integrating an internal ADC or featuring a small number of ADC channels. In this paper, a technique is presented to directly interface sensors with analog voltage output to the digital input port of a microcontroller or FPGA. The proposed method requires only a few passive components and is based on the measurements of the duty cycle of a digital square-wave signal. This technique was investigated by means of circuit simulations using LTSpice and was implemented in a commercial low-cost FPGA device (Gowin GW1NR-9). The duty cycle of the square-wave signal features a good linear correlation with the analog voltage to be measured. Thus, a look-up table to map the analog voltage values to the measured duty cycle is not required with benefits in terms of memory occupation. The experimental results on the FPGA device have shown that the analog voltage can be measured with a maximum accuracy of 1.09 mV and a sampling rate of 9.75 Hz. The sampling rate can be increased to 31.35 Hz and 128.31 Hz with an accuracy of 1.61 mV and 2.68 mV, respectively.

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Section: Introductionmentioning

confidence: 99%

Efficient and Accurate Analog Voltage Measurement Using a Direct Sensor-to-Digital Port Interface for Microcontrollers and Field-Programmable Gate Arrays

Grossi

2024

Sensors

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“…Successive-approximation-register (SAR) ADC is quite powerful and area-efficient due to its mostly digitized structure [1,2], which is scalable with respect to process development. Nonetheless, the bit-by-bit operation sequence limits its sampling rate and the comparator noise confines the overall signal-noise-ratio (SNR) [3,4].…”

Section: Introductionmentioning

confidence: 99%

A 12-Bit 200 MS/s Pipelined-SAR ADC Using Back-Ground Calibration for Inter-Stage Gain

2020

Electronics

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A 12-bit 200 MS/s pipelined successive-approximation-register (SAR) analogue-to-digital-converter (ADC) implemented in 40 nm CMOS is presented. Such an ADC consists of two asynchronous SAR ADCs and a dynamic amplifier, which consumes a static power of 1.2 mW (the total power is 8 mW) and occupies an area of 0.046 mm2. The inter-stage gain is affected by the parasitic capacitance in SAR ADCs as well as the gain of the dynamic amplifier, which is variable with respect to process-voltage-temperature (PVT). A background calibration of the inter-stage gain is proposed to adjust the inter-stage gain and to track the PVT variables. The measurement results show that, with calibration, the spurious-free-dynamic-range (SFDR) and signal-to-noise-and-distortion-ratio (SINAD) can be improved from 68 dB and 61 dB to 78 dB and 63 dB, respectively. The dynamic performance was stable under different VT conditions.

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A Self-Testing Platform with a Foreground Digital Calibration Technique for SAR ADCs

Cited by 2 publications

References 12 publications

Efficient and Accurate Analog Voltage Measurement Using a Direct Sensor-to-Digital Port Interface for Microcontrollers and Field-Programmable Gate Arrays

Efficient and Accurate Analog Voltage Measurement Using a Direct Sensor-to-Digital Port Interface for Microcontrollers and Field-Programmable Gate Arrays

A 12-Bit 200 MS/s Pipelined-SAR ADC Using Back-Ground Calibration for Inter-Stage Gain

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