A SEU Hardened Dual Dynamic Node Pulsed Hybrid Flip-Flop with an Embedded Logic Module

Adapur, Rohan S.; Kumar, S. Satheesh

doi:10.1007/978-981-13-1936-5_7

Cited by 1 publication

(1 citation statement)

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“…RHBD FFs, in this review, are classified into three different categories; they are spatial redundancy FF that makes different copies of the same FF in space [1,[6][7][8][9], temporal redundancy FF that compares the signal at different times by adding some delay [10][11][12][13][14], and node hardening FF that strengthens the internal nodes of the FFs and protects them from flipping by soft errors [4,[15][16][17][18][19][20][21][22]. Additionally, some FFs can be categorized into multiple categories such as spatial-temporal redundancy FF [7,[23][24][25][26] or node hardening FF with spatial/temporal redundancy [27,28].…”

Section: Introductionmentioning

confidence: 99%

Categorization and SEU Fault Simulations of Radiation-Hardened-by-Design Flip-Flops

Hamed

Lee

2021

Electronics

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In the previous three decades, many Radiation-Hardened-by-Design (RHBD) Flip-Flops (FFs) have been designed and improved to be immune to Single Event Upsets (SEUs). Their specifications are enhanced regarding soft error tolerance, area overhead, power consumption, and delay. In this review, previously presented RHBD FFs are classified into three categories with an overview of each category. Six well-known RHBD FFs architectures are simulated using a 180 nm CMOS process to show a fair comparison between them while the conventional Transmission Gate Flip-Flop (TGFF) is used as a reference design for this comparison. The results of the comparison are analyzed to give some important highlights about each design.

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