A Si bipolar 21-GHz/320-mW static frequency divider

Kurisu, M.; Ohuchi, M.; Sawairi, A.; Sugiyama, Masataka; Takemura, H.; Tashiro, Takuya

doi:10.1109/4.98982

Cited by 25 publications

(5 citation statements)

References 11 publications

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“…Da das veraltete, aber üblicherweise verwendete, SPICE-Gummel/Poon-Modell hierzu häufig nicht mehr geeignet ist, wurden in letzter Zeit eine Reihe verbesserter Modelle vorgeschlagen. Recent examples [3][4][5][6] also demonstrate silicon bipolar to be a serious competitor to GaAs, even in the area of microwave applications [7]. Weiterhin wird eine Übersicht über die unterschiedlichen Ansätze zur Modellierung des inneren Basisbahnwiderstandes sowie des äußeren Transistorbereiches gegeben.…”

Section: Frequenz 47 (1993) 7 8 a Survey Of Present Compact Models Founclassified

“…As a tion function (PACF) find many applications in multi-matter of principle the PACF out-of-phase values of dimensional signal processing, time-frequency-coding [1], binary arrays can be constantly low or vanish only for spatial correlation [2], built-in tests of VLSI-circuits [3] specified sizes [5]. As a tion function (PACF) find many applications in multi-matter of principle the PACF out-of-phase values of dimensional signal processing, time-frequency-coding [1], binary arrays can be constantly low or vanish only for spatial correlation [2], built-in tests of VLSI-circuits [3] specified sizes [5].…”

Section: Introductionmentioning

confidence: 99%

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A Survey of Present Compact Models for High-Speed Bipolar Transistors

Schröter¹

1993

Frequenz

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The design and optimization of (very-)high-speed integrated bipolar circuits requires accurate and physical transistor models. Since the obsolete but commonly used SPICE-Gummel/Poon model is often no longer suited for this task recently several improved models were proposed. In this paper the basic concepts of the most important new models are discussed with respect to their physical background and are compared in a uniform manner. Furthermore, an overview on the different approaches for modelling of the internal base resistance as well as of the external transistor region is given. The new models are proven to be well-suited for describing the static characteristics; however, except for one model, they let expect significant inaccuracies for high-speed applications at the higher current densities required there.Übersicht: Der Entwurf und die Optimierung (sehr) schneller integrierter Bipolarschaltungen erfordert genaue und physikalische Transistormodelle. Da das veraltete, aber üblicherweise verwendete, SPICE-Gummel/Poon-Modell hierzu häufig nicht mehr geeignet ist, wurden in letzter Zeit eine Reihe verbesserter Modelle vorgeschlagen. In dieser Arbeit werden die Grundkonzepte der wichtigsten neuen Modelle von ihrem physikalischen Hintergrund her vorgestellt und auf einheitliche Weise miteinander verglichen. Weiterhin wird eine Übersicht über die unterschiedlichen Ansätze zur Modellierung des inneren Basisbahnwiderstandes sowie des äußeren Transistorbereiches gegeben. Die Ergebnisse zeigen, daß sich die neuen Modelle zwar gut zur Beschreibung des statischen Verhaltens eignen, aber -bis auf eines -für Hochgeschwindigkeits-Anwendungen Ungenauigkeiten bei den dort erforderlichen höheren Stromdichten erwarten lassen.

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Section: Frequenz 47 (1993) 7 8 a Survey Of Present Compact Models Founclassified

Section: Introductionmentioning

confidence: 99%

A Survey of Present Compact Models for High-Speed Bipolar Transistors

Schröter¹

1993

Frequenz

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“…The model in (1) has also been shown to be valid for low-voltage triple-tail cells, other than the traditional series gates [12]- [13]. By considering that the power consumption is almost static and determined by the bias current I SS , the power consumption of a CML gate is equal to V DD ⋅I SS .…”

Section: Design Of Single CML Gates: a Brief Reviewmentioning

confidence: 96%

“…This circuit is a 2:1 MUX used as a fundamental stage of a MUX circuit in the standard SONET/SDH multi-channel optic-fiber system described in [2]. The reference clock frequency f is first divided by two [2] by the frequency divider consisting of the two crosscoupled D latches [1]. The divided clock signal generated by LATCH1 is applied to LATCH2, which drives the input of the subsequent multiplexer (MUX).…”

Section: Design Examplesmentioning

confidence: 99%

“…Bipolar Current Mode Logic (CML) is a logic style frequently used in very high-speed applications, including mobile, wireless, satellite and optic fiber communication systems [1]- [6], where the implementation of integrated circuits operating at frequencies up to dozens of GHz is required. The high speed feature of CML gates is achieved at the cost of a high bias current, which in turn determines a high static power consumption.…”

Section: Introductionmentioning

confidence: 99%

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