A simple accurate bridge-transducer interface with continuous autocalibration

Goes, Frank M. L. van der; Meijer, G.C.M.

doi:10.1109/19.585437

Cited by 46 publications

(14 citation statements)

References 7 publications

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“…However, although supply noise in principle is fully rejected in an ideally balanced Wheatstone bridge, due to mismatch in the bridge resistors or a ΔR change due to the measurand, the unbalanced bridge does suffer from supply noise in practice, resulting in a finite PSR. This can be solved by applying the ratiometric measurement method in which both the bridge's output voltage and the excitation voltage V DD are measured [2]. However, the dynamic range of the bridge's output voltage and the excitation voltage can differ by a factor 10 or more, which needs the introduction of voltage dividers or amplifiers.…”

Section: Introductionmentioning

confidence: 99%

“…However, the dynamic range of the bridge's output voltage and the excitation voltage can differ by a factor 10 or more, which needs the introduction of voltage dividers or amplifiers. This introduces extra complexity and extra power consumption and the accuracy is limited by resistor matching [2]. This paper presents an alternative readout approach in which no (external) reference voltages or amplifiers are needed to achieve a high PSRR in combination with low power.…”

Section: Introductionmentioning

confidence: 99%

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An energy-efficient BBPLL-based force-balanced Wheatstone bridge sensor-to-digital interface in 130nm CMOS

Rethy

Danneels

Smedt

et al. 2012

2012 IEEE Asian Solid State Circuits Conference (A-Sscc)

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An energy-efficient time-based sensor interface in 130nm CMOS technology is presented for resistive sensors. Traditionally resistive sensors are interfaced with a voltage divider or a Wheatstone bridge to transform the sensor signal to a voltage. However, both the voltage divider and the unbalanced Wheatstone bridge are highly affected by supply voltage variations, especially in smaller CMOS technologies with low supply voltages. As alternative to ratiometric measuring, this paper presents a force-balanced Wheatstone bridge interface circuit with a highly digital architecture, that offers the advantage of low power consumption with highly improved overall PSRR. It has a noise-frequency-independent PSRR of 52dB for in-band supply noise and supply noise amplitudes up to +10dB F S , which is an improvement of 46dB over the voltage divider and of 26dB over the unbalanced Wheatstone bridge. Apart from the sensor calibration, no other calibration or absolute precise clock or voltage references are needed due to the BBPLL-based architecture. The complete interface consumes only 124.5μW from a 1V supply with 10kHz input bandwidth and 10.4 bit resolution and 8.9 bit linearity, resulting in a state-of-the-art sensor Figure of Merit of 13.03 pJ/conversion.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

An energy-efficient BBPLL-based force-balanced Wheatstone bridge sensor-to-digital interface in 130nm CMOS

Rethy

Danneels

Smedt

et al. 2012

2012 IEEE Asian Solid State Circuits Conference (A-Sscc)

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“…In this direction, for compensation of offset capacitance, temperature and auto-calibration, switched capacitor-based techniques [1], [2], and ROM and over-sampling delta-sigma demodulation techniques [3], [4] have been reported. Some of the digital signal processing-based techniques, both iterative and noniterative, for pressure sensor linearization and compensation are found in [5]- [7].…”

mentioning

confidence: 99%

Neural-Network-Based Robust Linearization and Compensation Technique for Sensors Under Nonlinear Environmental Influences

Patra

Chakraborty

Meher

2008

IEEE Trans. Circuits Syst. I

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A novel artificial neural network (NN)-based technique is proposed for enabling smart sensors to operate in harsh environments. The NN-based sensor model automatically linearizes and compensates for the adverse effects arising due to nonlinear response characteristics and nonlinear dependency of the sensor characteristics on the environmental variables. To show the potential of the proposed NN-based technique, we have provided results of a smart capacitive pressure sensor (CPS) operating under a wide range of temperature variation. A multilayer perceptron is utilized to transfer the nonlinear CPS characteristics at any operating temperature to a linearized response characteristics. Through extensive simulated experiments, we have shown that the NN-based CPS model can provide pressure readout with a maximum full-scale error of only 1.5% over a temperature range of 50 to 200 C with excellent linearized response for all the three forms of nonlinear dependencies considered. Performance of the proposed technique is compared with a recently proposed computationally efficient NN-based extreme learning machine. The proposed multilayer perceptron based model is tested by using experimentally measured real sensor data, and found to have satisfactory performance.

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“…Figure 3 represents the simulation results for an input signal with unitary normalized amplitude and a SNR equal to 49.9 dB converted using a 10 bits ADC. Using self-dithering with a dither window equal to 32 and an oversampling factor of 2 12 , the effective number of bits is 12.39, which means a gain of almost 4.5 bits. Figure 4 represents the results when the same simulation parameters are considered but when the oversampling factor (N) varies between 2 7 and 2 19 .…”

Section: A Simulation Resultsmentioning

confidence: 99%

“…The average values of ground and FS measured signals can be used to estimate offset and gain errors of each channel, assuming that mean noise amplitude value is null. The last two measurements can be used to evaluate offset and gain correction coefficients providing system auto-calibration capabilities [12].…”

Section: System Descriptionmentioning

confidence: 99%

Adaptive analog-to-digital conversion using self-dithering in data acquisition systems

Pereira¹,

Girão²,

Postolache³

Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004.

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Sampling rate and resolution are two main competing interests in digital data acquisition systems design. High sampling rate data acquisition systems, usually based on flash converters, exhibits low-resolution, and high resolution systems, usually based on sigma-delta or dual-slope converters, are generally slow. However, a compromise can be obtained if digital signal processing techniques are used after analog-to-digital conversion. This paper presents a solution that can be used to optimize the performance of data acquisition systems based on analog-to-digital data acquisition boards. A dynamic self-adjusted sampling rate and dithering are proposed in order to improve signal-to-noise relation and measurement accuracy. Simulation and experimental results will be presented to evaluate digitizing system performance gains when the proposed solution is applied.

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A simple accurate bridge-transducer interface with continuous autocalibration

Cited by 46 publications

References 7 publications

An energy-efficient BBPLL-based force-balanced Wheatstone bridge sensor-to-digital interface in 130nm CMOS

An energy-efficient BBPLL-based force-balanced Wheatstone bridge sensor-to-digital interface in 130nm CMOS

Neural-Network-Based Robust Linearization and Compensation Technique for Sensors Under Nonlinear Environmental Influences

Adaptive analog-to-digital conversion using self-dithering in data acquisition systems

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