2003
DOI: 10.1063/1.1578707
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A simple, precise, and low jitter delay/gate generator

Abstract: Articles you may be interested inJitter characteristic of series magnetic pulse compressor employed in ns trigger generator Rev. Sci. Instrum. 85, 053302 (2014); 10.1063/1.4874003Sine gating detector with simple filtering for low-noise infra-red single photon detection at room temperatureThe generator of precise delay over the range of 0-650 s is described. The delay is selected with 10 ps resolution and its jitter is below 8 ps ͑rms͒ for delays up to 10 s. The generator was designed as a complementary metal-o… Show more

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Cited by 24 publications
(13 citation statements)
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“…Some solutions have been presented in the literature, based on ring oscillators [18] or delay locked loops [19], but still they do not achieve the required performance in terms of timing jitter since they feature a time resolution greater than 100 ps. A third solution implemented in a complex programmable logic device (CPLD) [20] meets all of the timing specifications and is based on a high accuracy programmable desktop signal generator. The FPGA can substitute the CPLD, whereas the Si5326 chip can replace the signal generator, to create this same structure.…”
Section: B Logic Stagementioning
confidence: 99%
See 1 more Smart Citation
“…Some solutions have been presented in the literature, based on ring oscillators [18] or delay locked loops [19], but still they do not achieve the required performance in terms of timing jitter since they feature a time resolution greater than 100 ps. A third solution implemented in a complex programmable logic device (CPLD) [20] meets all of the timing specifications and is based on a high accuracy programmable desktop signal generator. The FPGA can substitute the CPLD, whereas the Si5326 chip can replace the signal generator, to create this same structure.…”
Section: B Logic Stagementioning
confidence: 99%
“…This has been evaluated through a state-of-theart TCSPC system (SPC-130 from Becker and Hickl, used in single acquisition mode [20]) by sending two outputs of the pulse generator to its start and stop inputs, and using them to measure the time resolution between different channels of the pulse generator. Fig.…”
Section: B Time Resolutionmentioning
confidence: 99%
“…A commonly used interpolation method in TIGs involves phase shifting of a reference clock [3, 13−16]. Other ways of getting both wide generation range and high TI resolution are based on counting a certain number of periods of selected values [17] or finding coincidence between two clocks that operate on slightly different frequencies [18].…”
Section: Introductionmentioning
confidence: 99%
“…Programmable arrays can be used either as a complete platform that performs timing generation [3,15,16,18] or just as a part of generator [13,14,17,19,20]. FPGA buildin DLLs and PLLs greatly facilitate TIG integration in a single chip but, so far, cannot generate as low-jitter TIs as those using external modules, e.g.…”
Section: Introductionmentioning
confidence: 99%
“…Of special importance are the precise TI generators, on which stringent stability requirements for generated intervals are imposed. The TI instability value characterizes a level of random changes of the intervals, and for the precise generators it varies from tens of picoseconds (for the already out of date И1 8 time shift source) to a few picoseconds (for the T5300U up to date generator from the VIGO System S.A. company [1]). …”
Section: Introductionmentioning
confidence: 99%