A single event transient detector in SRAM-based FPGAs

Abstract

This paper presents a novel single event transient (SET) measurement circuit in SRAM-based field programmable gate arrays (FPGAs). Experimental results demonstrate that the new pulse detector is able to onchip measure bipolar pulses with a detection limit of near 150 ps, compared with existing pulse detectors, detection capability and detection precision are effectively improved.

Jitter-Quantizing-Based TRNG Robust Against PVT Variations

“…Since the two chains have different propagation delays in advance, the edges of the faster chain will chase the other edges in the slower chain, so the pulse width can be determined: the Vernier interval (Delay1-Delay2) multiplied by the number of propagation stages required for the two chains to meet. As known from experimental results in [28], the edges chasing part is able to quantize pulse width with a good accuracy. Obviously, reducing the Vernier interval can further improve the conversion accuracy (optimized to 30 ps in [28]).…”

“…As known from experimental results in [28], the edges chasing part is able to quantize pulse width with a good accuracy. Obviously, reducing the Vernier interval can further improve the conversion accuracy (optimized to 30 ps in [28]). However, this optimization trend is unsustainable because there is jitter during edge propagation due to electronic thermal noise.…”

“…The main principle of the proposed jitter quantization is based on the high precision time-to-digital conversion (TDC) [26] using Vernier technology. Based on Vernier technique, we implement pulse measurement circuit in Xilinx Virtex-6 XC6VLX240T-1FF1156 (ML 605) FPGA in [27], [28]. As shown in Fig.…”