A Single Phase Reduced Device Count Multilevel Inverter Topology Using MCPWM for Renewable Energy Systems

Narendiran, S.; Sahoo, Sarat Kumar

doi:10.1016/j.egypro.2017.05.128

Cited by 5 publications

(2 citation statements)

References 12 publications

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“…Step 4: Complete switching sequence of switch S 6 is obtained by EXNOR of the positive half cycle and negative half cycle switching sequences which are given in the above two steps. Resultant logical equation of switching sequence for switch S 6 is given in (13) and represented in Table 15.…”

Section: B Logical Equation For Switch S 6 In 5 Switch Modulementioning

confidence: 99%

Analysis of Logic Gates for Generation of Switching Sequence in Symmetric and Asymmetric Reduced Switch Multilevel Inverter

Kumar

2019

IEEE Access

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Analysis of logic gates for the switching sequence operation of reduced switch multilevel inverter (MLI) is introduced in this paper. Two variants of MLI with reduced switches are considered for the analysis of the logic gates to obtain proper output voltage level. One MLI is with the symmetrical voltage, and the other is with the asymmetrical voltage. The analysis of the proposed logical operation is presented through the single-phase seven-level output voltage for both symmetrical and asymmetrical inverters. Input pulse pattern for the operation of the logic gates are chosen from the multi carrier pulse width modulation (PWM) techniques as phase disposition (PD), phase opposition disposition (POD), and alternate POD (APOD). The analysis for the generation of the required pulse pattern to operate the switches in MLI is presented as logical equations. The simulation work is performed and evaluated with the MATLAB/Simulink. The realtime simulation is performed for the required pulse pattern and generated with the support of dSPACE 1104. The THD comparative analysis is analyzed with a modulation index and various PWM methods.INDEX TERMS 5 switch module, 8 switch module, logic gates, multilevel inverter, pulse pattern, multi carrier sinusoidal pulse width modulation, total harmonic distortion.

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Section: B Logical Equation For Switch S 6 In 5 Switch Modulementioning

confidence: 99%

Analysis of Logic Gates for Generation of Switching Sequence in Symmetric and Asymmetric Reduced Switch Multilevel Inverter

Kumar

2019

IEEE Access

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“…Power electronic converters are used for the integration of various renewable energy sources called hybrid structures. Control aspects of the various power converters are performed to obtain the required system parameters like improved efficiency for PV system and demand side with economical conditions (Dorahaki, 2015;Narendiran and Sahoo, 2017;Dorahaki et al, 2019). Efficiency and economical conditions motivate the authors to propose the control of reduced switch count MLI with simulation analysis.…”

Section: Introductionmentioning

confidence: 99%

Analysis of Switching Sequence Operation for Reduced Switch Multilevel Inverter With Various Pulse Width Modulation Methods

Kanike

Raju

2020

Front. Energy Res.

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Pulse width modulation (PWM) methods are used to control the switching sequence operations of conventional multilevel inverters (MLIs) and reduced switch multilevel inverters (RSMLIs). Many researchers proposed various RSMLIs with their switching sequence operation and PWM control techniques. However, the switching operations of RSMLIs are not similar to conventional MLIs, which are a major problem of switch control. Logical equations are proposed for the operation of RSMLIs with the multi-carrier PWM methods like alternative phase opposition disposition (APOD), phase opposition disposition (POD), and phase disposition (PD). To operate the individual switch in symmetrical and asymmetrical RSMLI, logical operators are used to produce required pulse sequence from the sequence of PWM method and their analysis is not present in previous works. The proposed methodology can be applied to PV systems for efficient operation. The proposed methodology and binary representation of PWM method are analyzed on various RSMLIs for seven-level output voltage to operate each individual switch. Control of individual switching sequence and the operation of RSMLIs are simulated using MATLAB/Simulink. THD comparison is presented for RSMLI, DCL MLI, and SCSD MLI with various PWM methods.

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A Three-Phase Hybrid Multilevel Inverter for Medium Voltage Applications

Qureiosh,

Makdisie,

Mohammed

2023

2023 3rd International Conference on Emerging Smart Technologies and Applications (eSmarTA)

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A Single Phase Reduced Device Count Multilevel Inverter Topology Using MCPWM for Renewable Energy Systems

Cited by 5 publications

References 12 publications

Analysis of Logic Gates for Generation of Switching Sequence in Symmetric and Asymmetric Reduced Switch Multilevel Inverter

Analysis of Logic Gates for Generation of Switching Sequence in Symmetric and Asymmetric Reduced Switch Multilevel Inverter

Analysis of Switching Sequence Operation for Reduced Switch Multilevel Inverter With Various Pulse Width Modulation Methods

A Three-Phase Hybrid Multilevel Inverter for Medium Voltage Applications

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