A single-poly EEPROM with low leakage charge pump and peripheral circuits for passive RFID tag in a standard CMOS technology

Abstract

A complete single-poly 2k-bit EEPROM solution including memory cells and peripheral circuits is presented and embedded into a passive RFID tag using a 0.18-µm standard CMOS technology. A charge pump with a Diode-C all-pass network and peripheral circuits without static current are proposed to reduce power consumption. A three-transistor memory cell is adopted for CMOS-compatibility, low operation voltage, and low complexity of drivers. The proposed EERPOM occupies an active area of 0.21 mm 2 . The leakage current during read operation is 36 nA from 1-V supply, while the static current during write operation is 1.3 µA from 1.8-V supply.