2003
DOI: 10.1109/jssc.2003.813253
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A slew-rate controlled output driver using pll as compensation circuit

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Cited by 36 publications
(2 citation statements)
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“…The total area of the control circuit presented in this paper was 0.026 mm 2 , while circuits that use a digital approach to control the slew rate of the bus transitions. using VCOs, PLLs and DLLs, occupies an area more than six times larger (0.16 mm 2 ) [4]. Further investigation is being conducted to study the possibility of making the translinear core using only MOS transistors operating in the subthreshold region [13,14], in order to reduce the area of the integrated circuit.…”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…The total area of the control circuit presented in this paper was 0.026 mm 2 , while circuits that use a digital approach to control the slew rate of the bus transitions. using VCOs, PLLs and DLLs, occupies an area more than six times larger (0.16 mm 2 ) [4]. Further investigation is being conducted to study the possibility of making the translinear core using only MOS transistors operating in the subthreshold region [13,14], in order to reduce the area of the integrated circuit.…”
Section: Resultsmentioning
confidence: 99%
“…Since the battery voltage V bat , which is the supply voltage in vehicles, can vary from 7 V on a cold day to 40 V on a load dump clamped pulse, generating an output signal with a constant slew-rate independently of the varying logic level amplitudes requires special circuits [4]. In this paper it is presented a simple and robust circuit technique that uses a bipolar translinear circuit core [5] to control the slew-rate of the digital transitions in a LIN transceiver.…”
Section: Introductionmentioning
confidence: 99%