A SpaceFibre multi lane codec System on a Chip: enabling technology for low cost satellite EGSE

IEICE Trans. Fundamentals

Fanucci

2019

Self Cite

Alessandro LEONI †a) , Pietro NANNIPIERI †b) , Nonmembers, and Luca FANUCCI †c) , Member SUMMARY The technology advancement of satellite instruments requires increasingly fast interconnection technologies, for which no standardised solution exists. SpaceFibre is the forthcoming protocol promising to overcome the limitation of its predecessor SpaceWire, offering data-rate higher than 1 Gbps. However, while several implementations of the Space-Fibre IP already exist, its Network Layer is still at experimental level. This article describes the architecture of an implemented SpaceFibre Routing Switch and provides synthesis results for common FPGAs.

Section: Synthesis Resultsmentioning

confidence: 99%

VHDL Design of a SpaceFibre Routing Switch

Leoni

IEICE Trans. Fundamentals

Fanucci

2019

Self Cite

“…The SWIP has been successfully integrated in the data link layer of a two lanes SpaceFibre codec to evaluate its behavior in an operative context. The system has been implemented and tested on the Xilinx board, as documented in [11]. The SWIP functionality has been been proven both with several simulation, and with intense hardware testing (i.e.…”

Section: Resultsmentioning

confidence: 99%

A Configurable Hardware Word Re-Ordering Block for Multi-Lane Communication Protocols: Design and Use Case

IEICE Trans. Fundamentals

Dinelli

Fanucci

2019

Self Cite

Data rate requirements, from consumer application to automotive and aerospace grew rapidly in the last years. This led to the development of a series of communication protocols (i.e. Ethernet, PCI-Express, RapidIO and SpaceFibre), which use more than one communication lane, both to speed up data rate and to increase link reliability. Some of these protocols, such as SpaceFibre, are able to detect real-time changes in the number of active lanes and to adapt the data flow appropriately, providing a flexible solution, robust to lane failures. This results in a real time varying data path in the lower layers of the data handling system. The aim of this paper is to propose the architecture of a hardware block capable of reading a fixed number of words from a host FIFO and shaping them on a real time variable number of words equal to the number of active lanes.

“…The transceivers are externally connected through a Xilinx FMC XM104 [22] expansion board, using e-SATA cables. The Cortex A9 generates and consumes packets to be transmitted or received over the SpaceFibre link, as described in [18]. The system automatically checks whether all received packets are correct.…”

Section: Hardware Setup and Testsmentioning

confidence: 99%

“…These satellites often mount a reduced number of devices and usually a single payload, thus point-to-point high-speed connections are definitively preferred against more complex network topologies. The Multi lane layer is not included as well: it allows increasing the maximum achievable data-rate and system reliability adding redundancy but requiring considerably more hardware resources [18].…”

mentioning

confidence: 99%

Design of a Reduced SpaceFibre Interface: An Enabling Technology for Low-Cost Spacecraft High-Speed Data-Handling

Dinelli

Davalle³

et al. 2019

Aerospace

Self Cite

SpaceFibre is an upcoming on-board high-speed communication protocol for space applications. It has been developed in collaboration with the European Space Agency to answer the growing data-rate requirement of satellite payloads such as Synthetic Aperture Radars or hyper-spectral imagers. SpaceFibre offers a complete set of features (i.e., Fault Detection, Isolation and Recovery, and Quality of Service) that guarantees robust communication at the price of higher complexity. This article proposes an innovative modified implementation of the SpaceFibre standard: R-SpaceFibre. It has been designed to reduce hardware resources while keeping high data-rate capability and flow control. Attention is given to the trade-off between Data link layer complexity reduction and protocol features. The proposed protocol is particularly suitable in scenarios where very low bit error rate is foreseen and data integrity is not critical, for example in imaging instruments. The main advantage is a reduction of more than 40% of logical resources required per single interface. R-SpaceFibre may be a suitable solution for several applications, such as low earth orbit CubeSats, which have strict requirements in terms of available logic resources, mass, volume and cost, and more relaxed constraints in terms of upset immunity.