A spatially reconfigurable fast differential interface for a wafer scale configurable platform

Valorge, Olivier; Blaquiere, Yves; Savaria, Yvon

doi:10.1109/icecs.2010.5724727

Cited by 4 publications

(3 citation statements)

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“…According to post layout simulations, the proposed architecture supports a data rate of 2.5 Gbps with 200 mV of voltage swing. More details on the internal architecture can be found in (Valorge, Blaquière & Savaria, 2010).…”

Section: Prototypes Of the Waferboard™: Three Implemented Test Chipsmentioning

confidence: 99%

Advanced Applications of Rapid Prototyping Technology in Modern Engineering

Hoque¹

2011

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Manufacturing Engineering and serves as Head of the Bioengineering Research Group at the University of Nottingham Malaysia Campus. He received his bachelor degree in Materials and Metallurgical Engineering in 1998 from BUET, Bangladesh, then M Eng and PhD in Bioengineering from NUS, Singapore in 2003 and 2007, respectively. So far, he has authored two books, co-authored three book chapters and edited two books. He has also published more than 60 technical papers in referred journals and international conference proceedings. He is a member of InTech's Scientific Board and an invited lead guest editor of the International Journal of Materials and Mechanical Engineering and serves as a technical reviewer for about 10 international journals. He is a member of several professional scientific societies including Tissue Engineering and Regenerative Medicine International Society (TERMIS), and Tissue Engineering Society Malaysia (TESMA). His research interests include the areas of Biomaterials, Biofuel, Tissue Engineering, Stem Cells, Nanomaterials and Composite Materials.

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Section: Prototypes Of the Waferboard™: Three Implemented Test Chipsmentioning

confidence: 99%