A Special-Purpose Architecture for Solving the Breakpoint Median Problem

Bakos, Jason D.; Elenis, P.E.

doi:10.1109/tvlsi.2008.2001298

Cited by 10 publications

(7 citation statements)

References 27 publications

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“…In the case of MP (breakpoint) phylogenetic tree reconstruction, over 99% of the software run-time is spent in computing instances of TSP [14]. TSP is a widely studied NP-Complete problem for which several heuristics have been explored [15], [16], [17], [18], [19], [20], [21] and branch-and-bound methods [21], [22] continue to be the most popular among accurate solvers, owing to their effectiveness in reducing the super-exponential search space.…”

Section: Significancementioning

confidence: 99%

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On-Chip Network-Enabled Many-Core Architectures for Computational Biology Applications

Majumder¹,

Pande²,

Kalyanaraman³

2015

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2015

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Large-scale integration of multiple cores on a single chip is the current answer to the challenge of attaining higher computation throughput while restricting power consumption within acceptable limits. Network-on-Chip (NoC) is an emerging paradigm that can efficiently support integration of a massive number of cores on a chip by decoupling the on-chip computation and communication infrastructure, thereby overcoming scalability issues faced by conventional buses.Many scientific computing disciplines, such as computational biology, have seen a significant increase in the availability of parallel algorithms and highperformance computing (HPC) tools owing to high runtime complexities and/or the data-intensive nature underlying the computation. Software-only solutions are likely to be inadequate, creating the need for hardware accelerators. This dissertation explores the design and development of highly optimized NoC-based hardware accelerators for a particular class of biocomputing applications, viz. phylogeny reconstruction, which is important for evolutionary inferences in computational biology. This dissertation focuses on two computationally distinct phylogeny reconstruction approaches to demonstrate that NoC-based many-core platforms can deliver orders of magnitude reduction in time-to-solution, compared to v existing approaches. The Maximum Parsimony (MP) phylogeny reconstruction problem can be reduced to one of solving numerous instances of the classical Traveling Salesman Problem (TSP). 99% of the total software runtime is spent in computing TSP instances, whose solution typically involves an application of branch-and-bound runtime heuristics. This dissertation presents the design of many-core systems with core-level pipelined micro-parallel architecture and different interconnection topologies to achieve significant speedup and energy efficiency. In Maximum Likelihood (ML) phylogeny reconstruction, the improved quality of result comes at a higher computational cost, as this approach involves optimization over multi-dimensional real continuous space. We present NoCbased hardware accelerators that target function kernels contributing to a bulk of the runtime. These platforms combine novel ideas and approaches, such as space-filling Hilbert curves, parallelized core allocation schemes, and 3-D integration. We also explore the use of long-range on-chip wireless links on existing regular topologies to reduce network diameter, thereby reducing the average communication latency between cores. These platforms have the potential to serve a broader class of throughput-oriented HPC applications. viTable of Contents

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Section: Significancementioning

confidence: 99%

“…Prior work of designing hardware accelerators targeting breakpoint phylogeny is described in Chapter 2, e.g. [14]. In the following, we describe our NoC-based solution that delivers three orders of speedup over multithreaded software and one order of magnitude speedup over other hardware accelerators.…”

Section: Noc-based Accelerator For Breakpoint Phylogenymentioning

confidence: 99%

On-Chip Network-Enabled Many-Core Architectures for Computational Biology Applications

Majumder¹,

Pande²,

Kalyanaraman³

2015

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2015

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“…Bakos and Elenis [13] proposed a co-processor design for whole-genome phylogenetic reconstruction using a parallelized version of breakpoint median computation, which is an expensive component of the MP phylogenetic tree inference. The co-processor uses an FPGA-based multi-core implementation of the combinatorial search portion of the Travelling Salesman Problem (TSP) algorithm while the TSP graph construction is performed in software.…”

Section: Phylogeneticsmentioning

confidence: 99%

Hardware accelerators for biocomputing: A survey

Sarkar

Majumder

Kalyanaraman

et al. 2010

Proceedings of 2010 IEEE International Symposium on Circuits and Systems

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Computing research has become a vital cog in the machinery required to drive biological discovery. Computing has made possible significant achievements over the last decade, especially in the genomics sector. An emerging area is the investigation of hardware accelerators for speeding up the massive scale of computation needed in large-scale biocomputing applications. Various hardware platforms, such as FPGA, Graphics Processing Unit (GPU), the Cell Broadband Engine (CBE) and multi-core processors are being explored. In this paper, we present a survey of hardware accelerators for biocomputing by choosing a representative set of each.

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“…The phylogenetic likelihood function (PLF) has been accelerated around 8 times through the use of FPGA boards with built-in DSP slices in [14]. A whole genome phylogenetic reconstruction based on a parallelized version of the breakpoint median algorithm has been shown in [15]. Using a combination of software and FPGA, total execution has been reduced by a factor of 417 over single-thread software implementation.…”

Section: Related Workmentioning

confidence: 99%