A Spike-Latency Transceiver With Tunable Pulse Control for Low-Energy Wireless 3-D Integration

Abstract

Wireless 3D integration using Inductive Coupling Links (ICLs) has recently gained attention as a low-cost alternative to through silicon vias (TSVs) for interconnecting stacked silicon tiers. However, 3D integration using ICLs is often criticised for its inferior energy efficiency compared to conventional approaches. To address this challenge, in this paper, we present a low-energy ICL transceiver that combines: (1) a spike-latency encoding scheme (to reduce the number of energyexpensive analogue transmit pulses by encoding data in the timedomain), and (2) a tuneable current driver (to minimise the transmit energy depending on the given integration scenario). The proposed transceiver is modelled mathematically, simulated in 0.35um, 65nm and 28nm CMOS technologies, and experimentally validated in a 2-tier 3D stacked silicon test-chip. Silicon evaluation of the proposed modulation approach demonstrates an energy of 7.4pJ/bit, representing a reduction >13% when compared to previously reported schemes (or 7.4% when also considering the additional energy overheads of peripheral clock timing control circuits). Simulated results show even greater energy savings (up to 28%) at more advanced technology nodes. Combined with the adaptive current driver, this results in a 7.7× improvement in energy-per-bit compared to state-of-theart implementations across the same communication distance, marking an important progression towards cost and energy efficient 3D integration.

Proximity Wireless Communication Technologies: An Overview and Design Guidelines

“…Similar discussions can be seen in [15], [18], and [20]. Note that pJ/b is commonly used as a metric to compare the energy efficiency of PWC [12], even though the connection distances are different. The purpose of adopting PWC is primarily to reduce the implementation cost, and connecting the same distance as the wired connection is not important.…”

“…To overcome these challenges, PWC is being investigated as a wireless 3D integration technology [1], [2], [3], [4], [5], [6], [7], [8], [9], [10], [11], [12], [13], [14], [15], [16], [17], [18], [19], [20], [21], [22], [23], [24], [25], [26], [27], [28], [29], [30], [31], [32] as described in Sec. I.…”

“…Contrast to the capacitive coupling, since the magnetic field is not be attenuated by the silicon substrate, multiple-chip stacking is possible with the inductive coupling. As a result, inductive coupling has been widely investigated as an PWC technology for 3D integration [4], [5], [6], [7], [8], [9], [10], [11], [12], [13], [14], [15], [16], [17], [18], [19], [20], [21], [22], [23], [24], [25], [26], [27], [28], [29], [30], [31], [32].…”

“…In response, pulse modulation-based transceiver, which consumes current only when there are transitions in the transmitted data, is investigated as a way to reduce power consumption (Fig. 9) [4], [5], [7], [9], [12]. With the adoption of pulse modulation, power consumption becomes scalable with data rate.…”

“…Furthermore, the couplers can be formed in existing metal layers without requiring special processing steps, resulting in low manufacturing cost and high reliability. While a lot of initial research was focused on capacitive coupling communication technology for 2.5 and 3D integration [2], [3], inductive coupling technology was later developed to overcome challenges faced by capacitive coupling and to enable more chips to be integrated with higher stacking density [4], [5], [6], [7], [8], [9], [10], [11], [12], [13], [14], [15], [16], [17], [18], [19], [20], [21], [22], [23], [24], [25], [26], [27], [28], [29], [30], [31], [32].…”