A study in dynamic neural control of semiconductor fabrication processes

Abstract

This paper describes a generic dynamic control system designed for use in semiconductor fabrication process control. The controller is designed for any batch silicon wafer process that is run on equipment having a high number of variables that are under operator control. These controlled variables include both equipment state variables such as power, temperature, etc. and the repair, replacement, or maintenance of equipment parts, which cause parameter drift of the machine over time. The controller consists of three principal components: 1) an automatically updating database, 2) a neural-network prediction model for the prediction of process quality based on both equipment state variables and parts usage, and 3) an optimization algorithm designed to determine the optimal change of controllable inputs that yield a reduced operation cost, in-control solution. The optimizer suggests a set of least cost and least effort alternatives for the equipment engineer or operator. The controller is a PC-driven software solution that resides outside the equipment and does not mandate implementation of recommendations in order to function correctly. The neural model base continues to learn and improve over time. An example of the dynamic process control tool performance is presented retrospectively for a plasma etch system. In this study, the neural networks exhibited overall accuracy to within 20% of the observed values of .986, .938, and .87 for the output quality variables of etch rate, standard deviation, and selectivity, respectively, based on a total sample size of 148 records. The control unit was able to accurately detect the need for parts replacements and wet clean operations in 34 of 40 operations. The controller suggested chamber state variable changes which either improved performance of the output quality variables or adjusted the input variable to a lower cost level without impairment of output quality.

Estimation and Control in Semiconductor Etch: Practice and Possibilities

“…Discussion and methods concerning the optimal choice of weights can be found in [120] (CMP application), [121], and [114], while in [122], the choice of the weights is studied with respect to the performance tradeoff between the short-term and long-term responses of the system. In [123], weight optimization trades off controlled variable regulation against manipulated variable effort, using a heuristic algorithm. A similar strategy has been adopted in [124], where the minimization focuses on the regulated outputs, using dynamic programming theory.…”

“…This is not a substantial issue in high-volume manufacturing, such as semiconductor etch, since most production plants are equipped with extensive databases for the recording of large numbers of process variables. Such data have been used in [82], [123], and [131]- [133] to train a neural network for the mapping of etch process input/ output relationships. A neural network model, predicting etch rate, is combined with a real-time optimizer in [131] to provide process setpoints to alleviate long-term process drift and sensitivity to PM interventions.…”

MBPCA application for fault detection in NMOS fabrication

“…One of the scarce examples is the work of Zambov [12], who modeled a low-pressure chamber for chemical vapor deposition. Nearly all of the modeling found in publications is either at the wafer level, accounting for diffusion mechanisms (e.g., see [13]), oxidation of silicon [14], and other transport phenomena, or empirical modeling (e.g., see [15]). In work reported in this article, the link between wafer level processing and equipment is established via a first-principles model of an oxidation tube.…”