A Study of Gate/Source-terminated Field-Plate NMOS Transistors and Its application in Switch Design

A high‐isolation switch based on a standard GaAs process

“…The technological process, which has been optimized for switching circuits, often exhibits a degradation of other parameters, which are important for realization of the accompanying circuits. For example, gain and efficiency of the amplifier realized on such a process is lower when comparison with the standard process realization [4]. This problem might prevent realization of a complete system on a chip, which usually contains various circuits such as switches, amplifiers, mixers, oscillators, and so on.…”

“…As the CPW-fed slot antenna is generally easy to fabricate and exhibits wider impedance bandwidth than its microstrip-fed counterpart, such design is widely discussed in the antenna community [5]. In the past decade, many CPW-fed slot antennas with dissimilar shapes and sizes can be found in the open-literature [1][2][3][4][5][6][7][8], and among them, the rectangular (or square) slot shape is commonly used for broadband [1] or UWB [6][7][8] design. In recent years, the increasing popularity in worldwide interoperability for microwave access (WiMAX) communication system has led to the design of slot antenna specifically catered only for WiMAX operation [9].…”

“…Amid different types of antenna designs for wide or broad band operation, the slot antenna design is one of the favorite candidates since it possesses the advantages such as simple structure, wide impedance bandwidth, and good bidirectional radiation characteristic [1][2][3]. Presently, the most employed feeding technique for slot antenna designated for wireless local area network (WLAN) operation is microstrip-fed [4] and coplanar waveguide (CPW)-fed [5]. As the CPW-fed slot antenna is generally easy to fabricate and exhibits wider impedance bandwidth than its microstrip-fed counterpart, such design is widely discussed in the antenna community [5].…”

“…Recently, several techniques have been proposed to optimize the technology for switching applications [1][2][3][4][5][6]. Most of those attempts focus on reducing parasitic elements of the transistor such as the drain-to-source capacitance and resistance.…”