A study of optimal 4-bit reversible circuit synthesis from mixed-polarity Toffoli gates

Szyprowski, Marek; Kerntopf, Paweł

doi:10.1109/nano.2012.6322178

Cited by 8 publications

(5 citation statements)

References 10 publications

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“…The circuits achieved by our new synthesis algorithm in general use less gates than the circuits achieved by the CBS algorithm. Our Algorithm 5 works for arbitrary n-bit bijective functions, whereas the exact synthesis found in the literature work only for the cases of n = 3 and n = 4 bits [Wille et al, 2012, Szyprowski andKerntopf, 2012]. Considering that the quantum cost [Barenco et al, 1995] of each GT gate is proportional to the number of control bits, the quantum cost of circuits generated by Algorithm 5 is, in average, less than the quantum cost of circuits generated by CBS algorithm.…”

Section: Discussionmentioning

confidence: 99%

See 1 more Smart Citation

A reversible circuit synthesis algorithm with progressive increase of controls in generalized Toffoli gates

Dalcumune¹,

Kowada²,

Ribeiro³

et al. 2021

jucs

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We present a new algorithm for synthesis of reversible circuits for arbitrary n-bit bijective functions. This algorithm uses generalized Toffoli gates, which include positive and negative controls. Our algorithm is divided into two parts. First, we use partially controlled gen- eralized Toffoli gates, progressively increasing the number of controls. Second, exploring the properties of the representation of permutations in disjoint cycles, we apply generalized Toffoli gates with controls on all lines except for the target line. Therefore, new in the method is the fact that the obtained circuits use first low cost gates and consider increasing costs towards the end of the synthesis. In addition, we employ two bidirectional synthesis strategies to improve the gate count, which is the metric used to compare the results obtained by our algorithm with the results presented in the literature. Accordingly, our experimental results consider all 3-bit bijective functions and twenty widely used benchmark functions. The results obtained by our synthesis algorithm are competitive when compared with the best results known in the literature, considering as a complexity metric just the number of gates, as done by alternative best heuristics found in the literature. For example, for all 3-bit bijective functions using generalized Toffoli gates library, we obtained the best so far average count of 5.23.

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Section: Discussionmentioning

confidence: 99%

“…There are optimal algorithms restricted to 3 bits [Wille et al, 2012] and to 4 bits [Szyprowski and Kerntopf, 2012]. These methods mainly formulate the synthesis problem as a sequence of instances of standard decision problems, such as Boolean satisfiability.…”

Section: Introductionmentioning

confidence: 99%

A reversible circuit synthesis algorithm with progressive increase of controls in generalized Toffoli gates

Dalcumune¹,

Kowada²,

Ribeiro³

et al. 2021

jucs

View full text Add to dashboard Cite

show abstract

“…It's already proved in [8][9] that the optimal logic circuits for any of 16! (Equals to over 1013*2) requires at most fifteen 4-bit input gates.…”

Section: Fig 7 Basic Scheme Of Cipher For Encryption and Decryption mentioning

confidence: 99%

FPGA Implementation of Encryption and Decryption of a Message using Optimized Reconfigurable Reversible Gate

Rajesh¹,

Reddy²

2019

IJRTE

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The prime incentive to learn reversible computation is that it is the best efficient way to reduce heat dissipation than any other conventional methods. The major condition for reversibility is that there is a one-to-one connection between each input and output vectors and it has received a huge significance because of there no information loss throughout the reversible computation which results in reduces the power dissipation. Here, we proposed the design of encryption/decryption of the data schemes by using reversible computing. In this regard, a basic building block is designed for encryption design is simply cascading of a 4-bit reversible gates and it is performed every 4-variable reversible functions, for this intention a new reconfigurable reversible gate (RRG) is proposed and is designed with the use of basic reversible gates like NOT gate, CNOT gate, Toffoli gate, and Fredkin gates. In this work, the encryption/decryption of an 8-bit data is proposed and the Simulation results of encryption/decryption of the circuits using reversible gates are also presented. The gate count, delay, constant inputs, and the garbage outputs are calculated. The complete Simulation and the synthesis process can be finished with the Xilinx ISE 14.7 version and it is dumped on the FPGA Zynq board.

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“…Early studies of primitive reversible gates are presented at [3], which is adopted for the derivation of QC for generalized Toffoli and Fredkin gates in [2]. Recent advances at experimental quantum computing [18] shows that the QC of negative-control gates are comparable to that of positive-control gates, thereby spawning several works on reversible logic synthesis with mixed-polarity gate libraries [19]. An improved circuit, in terms of less Quantum cost, for generalized Toffoli gates is presented in [20].…”

Section: Ancilla Countmentioning

confidence: 99%

Complexity Analysis of Reversible Logic Synthesis

Chattopadhyay,

Chandak,

Chakraborty

2014

Preprint

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Reversible logic circuit is a necessary construction for achieving ultra low power dissipation as well as for prominent post-CMOS computing technologies such as Quantum computing. Consequently automatic synthesis of a Boolean function using elementary reversible logic gates has received significant research attention in recent times, creating the domain of reversible logic synthesis. In this paper, we study the complexity of reversible logic synthesis. The problem is separately studied for bounded-ancilla and ancilla-free optimal synthesis approaches. The computational complexity for both cases are linked to known/presumed hard problems. Finally, experiments are performed with a shortest-path based reversible logic synthesis approach and a (0-1) ILP-based formulation.

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A study of optimal 4-bit reversible circuit synthesis from mixed-polarity Toffoli gates

Cited by 8 publications

References 10 publications

A reversible circuit synthesis algorithm with progressive increase of controls in generalized Toffoli gates

A reversible circuit synthesis algorithm with progressive increase of controls in generalized Toffoli gates

FPGA Implementation of Encryption and Decryption of a Message using Optimized Reconfigurable Reversible Gate

Complexity Analysis of Reversible Logic Synthesis

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