A study of thread migration in temperature-constrained multicores

Michaud, Pierre; Seznec, André; Fetis, Damien; Sazeides, Yiannakis; Constantinou, Theofanis

doi:10.1145/1250727.1250729

Cited by 42 publications

(26 citation statements)

References 22 publications

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“…The second one is this argument should be used in trip count calculation and the argument should repeat. We report only on qualifying benchmarks, since others practically show neither speedup nor slowdown: hmmer and sphinx3 benchmarks from SPEC CPU 2006 benchmark suite, equake benchmark from SPEC OMP 2001 benchmark suite [2] and ATMI [13].…”

Section: A Experimental Set-upmentioning

confidence: 99%

Dynamic function specialization

Ali¹,

Rohou²

2017

2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)

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Abstract-Function specialization is a compilation technique that consists in optimizing the body of a function for specific values of an argument. Different versions of a function are created to deal with the most frequent values of the arguments, as well as the default case. Compilers can do a better optimization with the knowledge of run-time behaviour of the program. Static compilers, however, can hardly predict the exact value/behaviour of arguments, and even profiling collected during previous runs is never guaranteed to capture future behaviour. We propose a dynamic function specialization technique, that captures the actual values of arguments during execution of the program and, when profitable, creates specialized versions and include them at runtime. Our approach relies on dynamic binary rewriting. We present the principles and implementation details of our technique, analyze sources of overhead, and present our results.

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Section: A Experimental Set-upmentioning

confidence: 99%

Dynamic function specialization

Ali¹,

Rohou²

2017

2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)

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“…They showed that for four cores CMP running five threads, heat-and-run thread assignment (HRTA) and heat-and-run thread migration (HRTM) achieve 9% higher average throughput than stop-go and 6% higher average throughput than DVS. Moreover, when performance is constrained by temperature, the performance gains brought by thread migration and the importance of limiting the migration frequency to reduce performance overhead has been confirmed in [9]. In [9], a new migration method for temperature-constrained multicore is proposed to exchange threads whenever the simultaneous occurrence of a cold and a hot core is detected.…”

Section: Related Workmentioning

confidence: 99%

“…Moreover, when performance is constrained by temperature, the performance gains brought by thread migration and the importance of limiting the migration frequency to reduce performance overhead has been confirmed in [9]. In [9], a new migration method for temperature-constrained multicore is proposed to exchange threads whenever the simultaneous occurrence of a cold and a hot core is detected. The authors demonstrate that their method yields the same throughput with HRTM, but requires much less migrations.…”

Section: Related Workmentioning

confidence: 99%

“…The power dissipated by the rest of the chip is assumed to be negligible. Most importantly, the migration action in [9] above is triggered by the current temperature (when the temperature is higher than maximum allowed temperature) in these two papers; however, instead of considering the current temperature, we believe that an accurate future temperature prediction model could perform better in lowering the peak temperature.…”

Section: Related Workmentioning

confidence: 99%

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Predictive dynamic thermal management for multicore systems

Yeo

Liu

Kim

2008

Proceedings of the 45th Annual Design Automation Conference

157

116

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Recently, processor power density has been increasing at an alarming rate resulting in high on-chip temperature. Higher temperature increases current leakage and causes poor reliability. In this paper, we propose a Predictive Dynamic Thermal Management (PDTM) based on Application-based Thermal Model (ABTM) and Core-based Thermal Model (CBTM) in the multicore systems. ABTM predicts future temperature based on the application specific thermal behavior, while CBTM estimates core temperature pattern by steady state temperature and workload. The accuracy of our prediction model is 1.6% error in average compared to the model in HybDTM [8], which has at most 5% error. Based on predicted temperature from ABTM and CBTM, the proposed PDTM can maintain the system temperature below a desired level by moving the running application from the possible overheated core to the future coolest core (migration) and reducing the processor resources (priority scheduling) within multicore systems. PDTM enables the exploration of the tradeoff between throughput and fairness in temperature-constrained multicore systems. We implement PDTM on Intel's Quad-Core system with a specific device driver to access Digital Thermal Sensor (DTS). Compared against Linux standard scheduler, PDTM can decrease average temperature about 10%, and peak temperature by 5• C with negligible impact of performance under 1%, while running single SPEC2006 benchmark. Moreover, our PDTM outperforms HRTM [10] in reducing average temperature by about 7% and peak temperature by about 3• C with performance overhead by 0.15% when running single benchmark.

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“…All these techniques aim to ensure the system running under a fixed safe temperature constraint [2], [3], [5], [6], [7], [8],Most of these existing techniques is centralized approaches.…”

Section: Introductionmentioning

confidence: 99%